JODY-W2 - System integration manual
UBX-18068879 - R14
Design-in
Page 22 of 84
C1 - Public
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Although FR-4 dielectric material can result in high losses at high frequencies, it can still be an
appropriate choice for RF designs. In which case, aim to:
o
Minimize RF trace lengths to reduce dielectric losses.
o
If traces longer than few centimeters are needed, use a coaxial connector and cable to reduce
losses.
o
For good impedance control over the PCB manufacturing process, design the stack-up with
wide 50
traces with width of at least 200 µm.
o
Contact the PCB manufacturer for specific tolerance of controlled impedance traces. As FR-4
material exhibits poor thickness stability it gives less control of impedance over the trace
width.
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For PCBs with components larger than 0402 and dielectric thickness below 200 µm, add a
keep-out, that is, some clearance (void area) on the ground reference layer below any pin on the RF
transmission lines. This helps to reduce the parasitic capacitance to ground.
•
Route RF lines in 45 ° angle and avoid acute angles. The transmission lines width and spacing to
GND must be uniform and routed as smoothly as possible..
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Add GND stitching vias around transmission lines as shown in
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Provide a sufficient number of vias on the adjacent metal layer, as shown in
. Include a solid
metal connection between the adjacent metal layer on the PCB stack-up to the main ground layer.
•
To avoid crosstalk between RF traces and Hi-impedance or analog signals, route RF transmission
lines as far from noise sources (like switching supplies and digital lines) and any other sensitive
circuit.
•
Avoid stubs on the transmission lines. Any component on the transmission line should be placed
with the connected pin located over the trace. Also avoid any unnecessary components on RF
traces.
Figure 7: Example of RF trace and ground design from JODY-W2 EVK
