EVA-8M and EVA-M8 series - Hardware Integration Manual
UBX-16010593 - R06
Design-in
Page 9 of 47
Early Production Information
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For description of the different power operating modes see the
EVA-M8 Data Sheet [1] and the
EVA-8M Data Sheet [2].
2.2
Interfaces
The EVA-8M / EVA-M8 series GNSS modules provide UART, SPI and DDC (I
2
C compatible) interfaces
for communication with a host CPU. A USB interface is also available on dedicated pins (see section
2.2.4). Additionally, an SQI interface is available for connecting the EVA-8M / EVA-M8 series GNSS
modules with an optional external flash memory.
The UART, SPI and DDC pins are supplied by
VCC_IO
and operate at this voltage level.
Four dedicated pins can be configured as either 1 x UART and 1 x DDC or a single SPI interface
selectable by
D_SEL
pin. Table 1 below provides the port mapping details.
Pin 32 (D_SEL) = “high” (left open)
Pin 32 (D_SEL) = “Low” (connected to GND)
UART TXD
SPI MISO
UART RXD
SPI MOSI
DDC SCL
SPI CLK
DDC SDA
SPI CS_N
Table 1: Communication Interfaces overview
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It is not possible to use the SPI interface simultaneously with the DDC or UART interface.
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For debugging purposes, it is recommended to have a second interface e.g. USB available that is
independent from the application and accessible via test-points.
For each interface, a dedicated pin can be defined to indicate that data is ready to be transmitted.
The TXD Ready signal indicates that the receiver has data to transmit. Each TXD Ready signal is
associated with a particular interface and cannot be shared. A listener can wait on the TXD Ready
signal instead of polling the DDC or SPI interfaces. The UBX-CFG-PRT message lets you configure the
polarity and the number of bytes in the buffer before the TXD Ready signal goes active. The TXD Ready
function is disabled by default.
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The TXD Ready functionality can be enabled and configured by proper AT commands sent to the
involved u-blox cellular module supporting the feature. For more information see the
GPS
Implementation and Aiding Features in u-blox wireless modules [6].
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The TXD Ready feature is supported on several u-blox cellular module products.
2.2.1
UART interface
A UART interface is available for serial communication to a host CPU. The UART interface supports
configurable data rates with the default at 9600 baud. Signal levels are related to the
VCC_IO
supply
voltage. An interface based on RS232 standard levels (+/- 7 V) can be realized using level shifter ICs
such as the Maxim MAX3232.
Hardware handshake signals and synchronous operation are not supported.
A signal change on the UART RXD pin can also be used to wake up the receiver in Power Save Mode
(see the
u-blox 8 / u-blox M8 Receiver Description Including Protocol Specification [3]).
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Designs must allow access to the UART and the
SAFEBOOT_N
pin for future service, updates, and
reconfiguration.
