Tomcat i925X S5130
Chapter 3: BIOS Setup
3-14
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System Memory Frequency
Changing this option allows the memory to be run asynchronously from the FSB but it is best if
it is left at AUTO.
Auto
/ 400 / 533
System BIOS Cacheable
Enabling this option will cause the BIOS code from ROM to be copied on to the much faster
RAM at location F0000h-FFFFFh, thus increasing system performance. However, if any
program writes to this memory area, a system error may result.
Disabled /
Enabled
Video BIOS Cacheable
Enabling this option will cause the VIDEO BIOS code from the video adapter’s ROM to be
copied on to the much faster RAM, thus increasing system performance. However, if any
program writes to this memory area, a system error may result.
Disabled
/ Enabled
Memory Hole at 15M-16M
Certain ISA cards require exclusive access to the 1MB block of memory, from the 15th to the
16th megabyte, to work properly. This BIOS feature allows you to reserve that 1MB block of
memory for such cards to use.
If you
enable
this feature, 1MB of memory (
the 15th MB
) will be reserved exclusively for the
ISA card's use. This effectively reduces the total amount of memory available to the operating
system by 1MB.
If you
disable
this feature, the 15th MB of RAM will not be reserved for the ISA card's use.
The full range of memory is therefore available for the operating system to use. However, if
your ISA card requires the use of that memory area, it may then fail to work.
Since ISA cards are a thing of the past, it is highly recommended that you
disable
this feature.
Even if you have an ISA card that you absolutely have to use, you may not actually need to
enable this feature.
Most ISA cards do not need exclusive access to this memory area. Make sure that your ISA
card requires this memory area before enabling this feature. You should use this BIOS feature
only as a last-ditch attempt to get an ISA card to work.
Disabled
/ Enabled
DRAM Data Integrity Mode
This BIOS feature controls the ECC feature of the memory controller.
ECC, which stands for Error Checking and Correction, enables the memory controller to detect
and correct single-bit soft memory errors. The memory controller will also be able to detect
double-bit errors although it will not be able to correct them. This provides increased data
integrity and system stability. However, this feature can only be enabled if you are using
special ECC memory modules.
Because present day processors use 64-bit wide data paths, 72-bit (64-bit data + 8-bit ECC)
ECC memory modules are required to implement ECC. Please note that the maximum data
transfer rate of the 72-bit ECC memory module is the same as the 64-bit memory module. The
extra 8-bits are only for the ECC code and do not carry any data. So, using 72-bit memory
modules will not give you any boost in performance.
In fact, because the memory controller has to calculate the ECC code for every data word that
is read or written, there will be some performance degradation, roughly in the region of 3-5%.
This is one of the reasons why ECC memory modules are not popular among desktop users.
If you are using standard 64-bit memory modules, you must select the Non-ECC option.
However, if you already have 72-bit ECC memory modules, you should enable the ECC
feature.
Related Options:
Non-ECC /
ECC
