System Description IO-Link
Operating modes
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4.3
Operating principle
IO-Link is a digital point-to-point connection between an IO-Link master and an IO-Link device.
Process data and other information such as parameters and diagnostic messages are trans-
ferred with a 24 V pulse modulation via a combined switching status and data channel (C/Q).
IO-Link communication is independent of the fieldbus used.
4.4
Operating modes
The operating mode can be set separately at any port of the IO-Link master.
Two operating modes are available for the IO-Link master:
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IO-Link mode: IO-Link communication possible
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Standard I/O mode (SIO): digital I/O communication
IO-Link communication is implemented via the switching and communication cable (C/Q).
2
1
3
L+
C/Q
L–
4
5
IO-Link
SIO
Fig. 2: IO-Link communication via C/Q
During initialization the ports of the IO-Link master behave like a normal digital input. The IO-
Link devices are operated in IO-Link mode. A command of the higher-level IO-Link master es-
tablishes IO-Link communication in IO-Link mode. This command is called the “Wake-up re-
quest”.
4.4.1
IO-Link mode
In IO-Link mode communication takes place between an IO-Link master and an IO-Link device.
Communication always starts from the IO-Link master.
Transmission speed between IO-Link master and IO-Link device
Three transmission rates are defined in the IO-Link specification:
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4,8 kBaud
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38,4 kBaud
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230,4 kBaud
Each device supports only one transmission rate, an IO-Link master supports all transmission
rates. The transfer time of the cyclical process data is determined by the telegram length as well
as the delay times in the device and the master. With a transmission rate of 38.4 kBaud and a
telegram length of 2 byte the transmission time is typically 2.3 ms.
Response times
The response time of the IO-Link system provides information on the frequency and speed of
the data transmission between IO-Link master and IO-Link device. This response time depends
on the following factors:
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Minimum cycle time: Intervals defined in the IODD in which the IO-Link master addresses the
IO-Link device. Different minimum cycle times can be defined for different devices.
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Internal processing time of the IO-Link master and the IO-Link device