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T4G Technical Reference

TRENTON Technology Inc.

iii

Table of Contents

Advanced Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

CPU Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5

IDE Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7

IDE Device Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11

Floppy Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-15

SuperIO Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-17

DMI Event Logging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-21

Remote Access Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23

USB Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-25

PCI Plug and Play Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

Chipset Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1

Intel Brookdale-G NorthBridge Configuration . . . . . . . . . . . . . . . . 6-3

Intel ICH4 SouthBridge Configuration . . . . . . . . . . . . . . . . . . . . . . 6-5

Boot Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1

Boot Settings Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5

Boot Device Priority. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-9

Hard Disk Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-11

Removable Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-13

ATAPI CDROM Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-15

Appendix A - BIOS Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1

BIOS Beep Codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1

BIOS Error Messages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2

Bootblock Initialization Code Checkpoints . . . . . . . . . . . . . . . . . . A-6

Bootblock Recovery Code Checkpoints. . . . . . . . . . . . . . . . . . . . . A-7

Post Code Checkpoints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-8

DIM Code Checkpoints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-10

Additional Checkpoints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-11

Summary of Contents for T4G

Page 1: ...T4G 6130 xxx No 87 006133 000 Revision A TECHNICAL REFERENCE Pentium 4 or Celeron PROCESSOR BASED SBC...

Page 2: ......

Page 3: ...ation provided Trenton Technology Inc s liability shall in no event exceed the purchase price of the product purchased hereunder The foregoing limitation of liability shall be equally applicable to an...

Page 4: ...d and product names may be trademarks or registered trademarks of their respective companies LIABILITY DISCLAIMER This manual is as complete and factual as possible at the time of printing however the...

Page 5: ...em Bus 1 5 DMA Channels 1 5 Interrupts 1 5 BIOS Flash 1 5 Cache Memory 1 5 NetBurst Micro Architecture 1 6 DDR Memory 1 6 PCI Local Bus Interface 1 7 Universal Serial Bus USB 1 7 Video Interface 1 7 S...

Page 6: ...ns 2 3 I O Address Map 2 7 Interrupt Assignments 2 7 PCI Local Bus Overview 2 8 PCI Local Bus Signal Definition 2 9 PCI Local Bus Pin Numbering 2 10 PCI Local Bus Pin Assignments 2 11 PCI Local Bus Si...

Page 7: ...lay Setup 5 1 Chipset Setup 6 1 Intel Brookdale G NorthBridge Configuration 6 3 Intel ICH4 SouthBridge Configuration 6 5 Boot Setup 7 1 Boot Settings Configuration 7 5 Boot Device Priority 7 9 Hard Di...

Page 9: ...I O connector pins Do not apply pressure or attach labels to the SBC Use a grounded wrist strap at your workstation or ground yourself frequently by touching the metal chassis of the system before ha...

Page 11: ...following features 184 pin with gold plated contacts Non ECC 64 bit DDR memory Unbuffered configuration x8 x16 construction Non stacked NS ____________________________________________________________...

Page 12: ...power specification The external power supply must have a wattage rating of 250W or higher The T4G also requires that 3 3V be applied to the backplane from the power supply __________________________...

Page 13: ...ntel Pentium 4 microprocessor 2 8GHz 2 66GHz 2 53GHz 2 4GHz or 2 26GHz with 512K cache and a 533MHz Front Side Bus FSB 2 6GHz 2 5GHz 2 4GHz 2 2GHz 2 0GHz or 1 8GHz with 512K cache and a 400MHz FSB or...

Page 14: ...n cards Compatible with PCI Industrial Computer Manufacturers Group PICMG 1 0 Specification Supports up to 2GB of Double Data Rate DDR on board memory Floppy drive and dual PCI EIDE Ultra ATA 100 driv...

Page 15: ...Specifications T4G Technical Reference TRENTON Technology Inc 1 3 SBC BLOCK DIAGRAM...

Page 16: ...Specifications T4G Technical Reference TRENTON Technology Inc 1 4 SBC BOARD LAYOUT...

Page 17: ...the system bus at 400MHz or 533MHz which provides a higher bandwidth path for transferring data between main memory chipset and the processor DMA CHANNELS The SBC is fully PC compatible with seven DMA...

Page 18: ...roved software execution speeds NetBurst micro architecture improvements in the floating point and multimedia unit include making the registers 128 bits wide and adding a separate register for moving...

Page 19: ...periph erals via an external port VIDEO INTERFACE The analog video interface of the 845GV supports pixel resolutions up to 2048 x 1536 QXGA at a refresh rate of 60Hz The graphics and memory controlle...

Page 20: ...Intel 82562ET 10 100Base T Ethernet controller which supports 10Base T and 100Base TX Fast Ethernet modes The interface is compliant with IEEE 802 3 The main components of this interface are Intel 82...

Page 21: ...0 cables must be used with Ultra ATA 100 drives FLOPPY DRIVE INTERFACE The SBC supports two floppy disk drives Drives can be 360K to 2 88MB in any combination SERIAL INTERFACE Two high speed FIFO 16C5...

Page 22: ...0 mseconds 0 1 Disabled power on default 1 0 10 seconds 1 1 60 seconds The Watchdog Input WDI bit should be toggled immediately prior to changing the timeout period Once the WDS1 and WDS0 bits have be...

Page 23: ...additional on board power connector due to the power requirements of the Intel Pentium 4 processor This 4 pin connector P24 requires 12V from an external power supply that conforms to the ATX12V powe...

Page 24: ...ng MEAN TIME BETWEEN FAILURES MTBF 157 000 POH Power On Hours at 40 C per Bellcore UL RECOGNITION This SBC is a UL recognized product listed in file E208896 This board was investigated and determined...

Page 25: ...the way in which the LED displays in response to this self limiting mode Install for real time activity The LED lights only when the processor is operating in slow power mode Remove for latched activ...

Page 26: ...IBIOS displays the CMOS Settings Wrong message press F1 to go into the BIOS Setup Utility where you may reenter your desired BIOS settings load optimal defaults or load failsafe defaults _____________...

Page 27: ...nt setup utility The BIOS Setup Utility allows you to select to the following categories of options Main Menu Advanced Setup PCIPnP Setup Chipset Setup Boot Setup Security Setup Exit Each of these opt...

Page 28: ...25 27 29 31 33 Signal Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Gnd Pin 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 Signal N RPM NC D Rate0 P Index N Motoron 1 N Drive Sel2 N...

Page 29: ...I Transmit Data O Data Terminal Ready O Signal Gnd Pin 2 4 6 8 10 Signal Data Set Ready I Request to Send O Clear to Send I Ring Indicator I NC P8 Parallel Port Connector 26 pin dual row header Amp 10...

Page 30: ...rd Drive Connector 40 pin dual row header 3M 30340 6002HB Pin 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 Signal Reset Data 7 Data 6 Data 5 Data 4 Data 3 Data 2 Data 1 Data 0 Gnd DRQ 0 IOW...

Page 31: ...28 30 32 34 36 38 40 Signal Gnd Data 8 Data 9 Data 10 Data 11 Data 12 Data 13 Data 14 Data 15 NC Gnd Gnd Gnd SELPDS Gnd NC SCBL DET Add 2 CS 3S Gnd For ATA 66 and ATA 100 drives which should be set f...

Page 32: ...329 0000 5V over current protection Pin 1 2 3 4 Signal 5V USB0 USB0 USB0 Gnd USB0 P17B Universal Serial Bus USB Connector 4 pin USB vertical connector Molex 67329 0000 5V over current protection Pin 1...

Page 33: ...gle row header Amp 640456 2 Pin 1 2 Signal LED LED P22 System Management Bus Connector 2 pin single row header Amp 640456 2 Pin 1 2 Signal SMB Clock SMB Data P23 5V VRM Supply 2 pin header Molex 39 29...

Page 35: ...ISA PCI Reference T4G Technical Reference TRENTON Technology Inc 2 1 Chapter 2 ISA PCI Reference ISA BUS PIN NUMBERING 62 pin ISA Bus Connector Component Side of Board 36 pin ISA Bus Connector...

Page 36: ...B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 Gnd RESDRV 5V IRQ9 5V DRQ2 12V NOWS 12V Gnd SMWTC SMRDC IOWC IORC DAK3 DRQ3 DAK1 DRQ1 REFRESH BCL...

Page 37: ...ing this line should drive it low immediately upon detecting its valid address and a Read or Write command Machine cycles are extended by an integral number of clock cycles This signal should be held...

Page 38: ...ne must be held high until the microprocessor acknowledges the interrupt request Interrupt Service routine LA 23 17 I O These signals unlatched are used to address memory and I O devices within the sy...

Page 39: ...ccess of up to 16MB of memory SA 19 0 are gated on the system bus when BALE is high and are latched on the falling edge of BALE These signals are generated by the microprocessor or DMA Controller They...

Page 40: ...ISA PCI Reference T4G Technical Reference TRENTON Technology Inc 2 6 T C O Terminal Count T C provides a pulse when the terminal count for any DMA channel is reached...

Page 41: ...r Math Coprocessor Busy Reset Math Coprocessor Math Coprocessor Fixed Disk Game I O Parallel Printer Port 2 Serial Port 2 Prototype Card Reserved Parallel Printer Port 1 SDLC Bisynchronous 2 Bisynchro...

Page 42: ...m requirements and is applicable across multiple platforms and architectures The PCI component and add in card interface is processor independent enabling an efficient transition to future processor g...

Page 43: ...elow shows the pins in functional groups with required pins on the left side and optional pins on the right side PCI Pin List Required Pins Address Data AD 31 00 C BE 3 0 PAR Interface Control FRAME T...

Page 44: ...ISA PCI Reference T4G Technical Reference TRENTON Technology Inc 2 10 PCI LOCAL BUS PIN NUMBERING Component Side of Board 5 volt 32 bit PCI Connector...

Page 45: ...the 5 volt connector but is M66EN on the 3 3 volt connector Pins B50 B51 A50 and A51 are Connectors Keys on the 5 volt connector but are Gnd ground on the 3 3 volt connector I O Pin Signal Name I O P...

Page 46: ...BE1 AD14 Gnd AD12 AD10 Gnd A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 TRDY Gnd STOP 3 3V SDONE SBO Gnd PAR AD15 3 3V AD13 AD11 Gnd AD9 B50 B51 Connector Key Connector Key A50 A51 Connect...

Page 47: ...7 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94 Reserved Gnd C BE6 C BE4 Gnd AD63 AD61 V I O AD59 AD57 Gnd AD55 AD53 Gnd AD51 AD49 V I O AD47 AD45 Gnd AD43 AD41 Gnd AD39 AD37 V I...

Page 48: ...ming as DEVSEL AD 31 00 Address and Data are multiplexed on the same PCI pins A bus transaction consists of an address phase followed by one or more data phases During the address phase AD 31 00 conta...

Page 49: ...indicates to the agent that access to the bus has been granted This is a point to point signal Every master has its own GNT IDSEL Initialization Device Select is used as a chip select during configura...

Page 50: ...Request indicates to the arbiter that this agent desires use of the bus This is a point to point signal Every master has its own REQ REQ64 optional Request 64 bit Transfer when actively driven by the...

Page 51: ...serially shift test data and test instructions out of the device during TAP Test Access Port operation TMS optional Test Mode Select is used to control the state of the TAP Test Access Port controller...

Page 52: ...9 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 12V NC Gnd NC 5V 5V INTB INTD REQ3 REQ1 GNT3 Gnd Gnd CLKS0 Gnd CLKS1 Gnd REQ0 5V AD31 AD29 Gnd AD27 AD25 BKPL3 3V C BE3 AD23 Gnd AD21 AD19 NC AD17 C BE2 Gnd I...

Page 53: ...NUED I O Pin Signal Name I O Pin Signal Name B50 B51 Connector Key Connector Key A50 A51 Connector Key Connector Key B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 AD8 AD7 NC AD5 AD3 Gnd AD1 5V ACK64 5V...

Page 54: ...B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 B93 B94 NC Gnd C BE6 C BE4 Gnd AD63 AD61 5V AD59 AD57 Gnd AD55 AD53 Gnd AD51 AD49 5...

Page 55: ...ce is initialized the error message is displayed on the screen See BIOS Errors later in this section for more infor mation on error handling The following are some of the Power On Self Tests POST s wh...

Page 56: ...Once the POST routines complete successfully a screen displays showing the current configuration of your system including processor type base and extended memory amounts floppy and hard drive types d...

Page 57: ...rd is entered the following screen displays You may try again to enter the correct password If you enter the password incorrectly three times the system responds in one of two different ways depending...

Page 58: ...utines are performed test codes are presented on Port 80H These codes may be helpful as a diagnostic tool and are listed in Appendix A BIOS Messages If certain non fatal error conditions occur you are...

Page 59: ...CMOS memory Each time the system is powered on it is configured with these values unless the CMOS has been corrupted or is faulty The BIOS Setup Utility is resident in the ROM BIOS so that it is avai...

Page 60: ...s have been defined they display each time the BIOS Setup Utility is run System Time System Date These options allow you to set the correct system time and date If you do not set these parameters the...

Page 61: ...manual as noted below _______________________________________________________________________ NOTE Do not change the values for any option unless you understand the impact on system operation Dependin...

Page 62: ...All Events as Read Clear Event Log Event Log Statistics Remote Access Configuration Remote Access Serial Port Number Serial Port Mode Post Boot Support USB Configuration USB Function Legacy USB Suppor...

Page 63: ...tel Brookdale G NorthBridge Configuration Primary Video Device Graphics Mode Select Graphics Aperture Size Search for MDA Resources Intel ICH4 SouthBridge Configuration ICH4 Dev31 Func1 IDE ICH4 Dev31...

Page 64: ...rus protection These functions are described later in this chapter The following options may be modified Change Supervisor Password User Access Level Password Check Change User Password Unattended Sta...

Page 65: ...word and to enable boot sector virus protection The descriptions for the system options listed below show the values as they appear if you have not changed them yet Once values have been defined they...

Page 66: ...sword option the following window displays This is the message which displays before you have established a password or if the last password entered was the null password If a password has already bee...

Page 67: ...fications chapter of this manual for details _______________________________________________________________________ If a password has been established the following options and their default values a...

Page 68: ...s the same messages If you have signed on under the user password the Change Supervisor Password function is not available for modification If a user password has been established the Password Check o...

Page 69: ...Boot Sector Virus Protection Disabled Available options are Disabled Enabled _______________________________________________________________________ NOTE You should not enable boot sector virus prote...

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Page 71: ...ens are stored in the CMOS when this option is selected The CMOS checksum is calculated and written to the CMOS Control is then passed back to the AMIBIOS and the booting process continues using the n...

Page 72: ...without writing any changes to the CMOS Select Cancel to return to the BIOS Setup Utility screen Discard Changes When the Discard Changes option is selected the BIOS Setup Utility resets any param ete...

Page 73: ...ues which should provide the best performance characteristics If CMOS RAM is corrupted the Optimal settings are loaded automatically If you select the Load Optimal Defaults option the following window...

Page 74: ...al Reference TRENTON Technology Inc 3 20 You have two options Select Ok to load the Failsafe default settings Select Cancel to leave the current values in effect Copyright 2003 by Trenton Technology I...

Page 75: ...ng correct information _______________________________________________________________________ ADVANCED SETUP OPTIONS _______________________________________________________________________ NOTE Do no...

Page 76: ...LBA Large Mode Block Multi Sector Transfer PIO Mode DMA Mode S M A R T 32Bit Data Transfer ARMD Emulation Type Secondary IDE Master Secondary IDE Slave see options above Hard Disk Write Protect IDE D...

Page 77: ...Log Mark All Events as Read Clear Event Log Event Log Statistics Remote Access Configuration The options on the Remote Access Configuration subscreen allow you to set up or modify parameters for conf...

Page 78: ...ired changes to Advanced Setup you may make changes to other Setup options by using the right and left arrow keys to access other menus When you have made all of your changes you may save them by sele...

Page 79: ...s run Ratio CMOS Setting The processor is locked at the correct processor speed before shipment Changing the Ratio CMOS Setting option to another value has no effect on actual processor speed The Setu...

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Page 81: ...if you have not run the BIOS Setup Utility program yet Once values have been defined they display each time the BIOS Setup Utility is run OnBoard PCI IDE Controller This option specifies whether or n...

Page 82: ...ion screen The Setup screen displays the system options Primary IDE Master Hard Disk Primary IDE Slave Hard Disk Secondary IDE Master ATAPI CDROM Secondary IDE Slave Not Detected To view and or change...

Page 83: ...ptions are 0 5 10 15 20 25 30 35 ATA PI 80Pin Cable Detection This option allows you to select the mechanism for detecting an 80 pin ATA PI cable The Setup screen displays the system option ATA PI 80P...

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Page 85: ...TUP OPTIONS The following options are available for each of the four IDE devices on the primary and secondary IDE controllers Type This option allows you to specify what type of device is on the IDE c...

Page 86: ...se the physical parameters of the hard disk and do no translation to logical parameters The operating system which uses the parameter table will then see only 528MB of hard disk space even if the driv...

Page 87: ...ain that you are selecting the PIO mode supported by the IDE drive being configured The Setup screen displays the system option PIO Mode Auto Available options are Auto 0 1 2 3 4 DMA Mode This option...

Page 88: ...it transfer this feature must be set to Disabled The Setup screen displays the system option 32Bit Data Transfer Disabled Available options are Disabled Enabled ARMD Emulation Type This option specifi...

Page 89: ...AMIBIOS upon initial bootup FLOPPY CONFIGURATION OPTIONS The descriptions for the system options listed below show the values as they appear if you have not run the BIOS Setup Utility program yet Once...

Page 90: ...Advanced Setup T4G Technical Reference TRENTON Technology Inc 4 16 Available options are Disabled 360 KB 5 1 2 MB 5 720 KB 3 1 44MB 3 2 88MB 3...

Page 91: ...n the BIOS Setup Utility program yet Once values have been defined they display each time the BIOS Setup Utility is run OnBoard Floppy Controller The on board floppy drive controller may be enabled or...

Page 92: ...O ports via jumper settings AMIBIOS configures the on board serial ports to avoid conflicts AMIBIOS checks the ISA Bus for serial ports Any off board serial ports found on the ISA Bus are left at thei...

Page 93: ...C IrDA 4PPM Consumer Raw Ir Parallel Port Address This option enables the parallel port on the SBC and establishes the base I O address for the port The Setup screen displays the system option Paralle...

Page 94: ...l port to be used with devices which adhere to the Enhanced Parallel Port EPP specification EPP uses the existing parallel port signals to provide asymmetric bidirectional data transfer driven by the...

Page 95: ...ew Event Log When you select this option a window similar to the following displays showing unread events in the Event Log When you have finished viewing the Event Log press Esc to continue BIOS SETUP...

Page 96: ...nts are displayed Clear Event Log This option specifies whether or not the event log should be cleared The following window displays Selecting Ok discards all entries in the Event Log The next time yo...

Page 97: ...ed below show the values as they appear if you have not run the BIOS Setup Utility program yet Once values have been defined they display each time the BIOS Setup Utility is run Remote Access This opt...

Page 98: ...s for the serial port on which remote access is enabled The settings indicate baud rate eight bits per character no parity and one stop bit If the Remote Access option is set to Disabled this option i...

Page 99: ...as they appear if you have not run the BIOS Setup Utility program yet Once values have been defined they display each time the BIOS Setup Utility is run USB Function This option allows you to enable t...

Page 100: ...pe This option allows you to set the emulation type for USB Zip drives If the USB Function option is set to Disabled this option is not available The Setup screen displays the system option USB ZIP Em...

Page 101: ...__________________________________ WARNING Setting wrong values in below sections may cause system to malfunction Plug Play O S No Reset Config Data No PCI Latency Timer 64 Allocate IRQ to PCI VGA Yes...

Page 102: ...his option indicates whether or not the operating system installed in the computer is Plug and Play aware AMIBIOS only detects and enables PnP ISA adapter cards which are required for system boot An o...

Page 103: ...s are 32 160 64 192 96 224 128 248 Allocate IRQ to PCI VGA This option allows you to assign an IRQ to a PCI VGA card if the card requests an IRQ The Setup screen displays the system option Allocate IR...

Page 104: ...splays the system option OffBoard PCI ISA IDE Card Auto Available options are Auto PCI Slot1 PCI Slot2 PCI Slot3 PCI Slot4 PCI Slot5 PCI Slot6 If you select any value other than Auto the following opt...

Page 105: ...screen displays the system option IRQ Available where is the number of the interrupt request IRQ Two options are available Select Available to make the specified IRQ available for use by PCI PnP devi...

Page 106: ...reserved for use by legacy ISA adapter cards If the Reserved Memory Size option is set to Disabled this option is not available The Setup screen displays the system option Reserved Memory Address C800...

Page 107: ...the explanations following the screen for specific instructions about entering correct information _______________________________________________________________________ CHIPSET SETUP OPTIONS ______...

Page 108: ...ou to set up or modify parameters to configure the Intel ICH4 SouthBridge chip The following options may be modified ICH4 Dev31 Func1 IDE ICH4 Dev31 Func3 SMBUS ICH4 Dev29 Func0 USB 1 ICH4 Dev29 Func7...

Page 109: ...for the system options listed below show the values as they appear if you have not yet run Chipset Setup Once values have been defined they display each time Chipset Setup is run Primary Video Device...

Page 110: ...phics Mode Select Enabled 8MB Available options are Enabled 1MB Enabled 8MB Graphics Aperture Size This option allows you to set the size of the AGP aperture The Setup screen displays the system optio...

Page 111: ...e values as they appear if you have not yet run Chipset Setup Once values have been defined they display each time Chipset Setup is run ICH4 Dev31 Func1 IDE This option allows you to enable or disable...

Page 112: ...vailable options are Disabled Enabled ICH4 Dev29 Func0 USB 1 This option allows you to enable or disable USB Host Controller 1 function The Setup screen displays the system option ICH4 Dev29 Func0 USB...

Page 113: ...rnet controller LAN 1 P16 is to be used The LAN 1 interface supports 10 100Base T operations The Setup screen displays the system option On board Lan Enabled Available options are Disabled Enabled ISA...

Page 114: ...ays the system option IOAPIC Enabled Available options are Disabled Enabled Extended IOAPIC This option allows you to enable or disable the extended mode of the ICH4 IOAPIC function The Setup screen d...

Page 115: ...llection Enabled Available options are Disabled Enabled PC PCIB Select The Setup screen displays the system option PC PCIB Select Disabled Available options are Disabled Enabled DMA Types 0 1 2 3 5 6...

Page 117: ...___ NOTE If no device is found for one of the device types the line item for that device type does not display _______________________________________________________________________ BOOT SETUP OPTION...

Page 118: ...the system It allows you to select the type of drive which will be booted first second third etc If there are multiple drives of a particular type you may specify the order in which each drive of that...

Page 119: ...ou have made all desired changes to Boot Setup you may make changes to other Setup options by using the right and left arrow keys to access other menus When you have made all of your changes you may s...

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Page 121: ...Utility is run Quick Boot This option allows you to have the AMIBIOS boot quickly when the computer is powered on or go through more complete testing If you set the Quick Boot option to Enabled the BI...

Page 122: ...option specifies the system display mode which is set at the time the AMIBIOS post routines initialize an optional option ROM The Setup screen displays the system option AddOn ROM Display Mode Force...

Page 123: ...rd Present Available options are Absent Present Boot To OS 2 This option should be set to Yes if you are running the IBM OS 2 operating system and using more than 64MB of system memory on the SBC The...

Page 124: ...he need for any user response to a non fatal error condition message Non fatal error messages are listed in Appendix A BIOS Messages The Setup screen displays the system option Wait For F1 If Error En...

Page 125: ..._________________________ BOOT DEVICE PRIORITY OPTIONS 1st Boot Device 2nd Boot Device 3rd Boot Device This option specifies the device type description of each boot drive from which AMIBIOS attempts...

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Page 127: ..._______________________________________ HARD DISK DRIVES OPTIONS The SBC supports up to four hard disk drives through a primary and secondary controller in a master slave configuration 1st Drive 2nd D...

Page 128: ...bled is also available as an option if you do not want a particular drive to be included in the boot sequence The Setup screen displays the system options 1st Drive xxxxxxxxx 2nd Drive xxxxxxxxx 3rd D...

Page 129: ..._________________________________________________________________ REMOVABLE DRIVES OPTIONS The SBC supports multiple removable devices and allows you to change the boot sequence of these devices 1st D...

Page 130: ...available as an option if you do not want a particular device to be included in the boot sequence The Setup screen displays the system option 1st Drive xxxxxxxxx 2nd Drive xxxxxxxxx where xxxxxxxxx i...

Page 131: ...CDROM drives available _______________________________________________________________________ ATAPI CDROM DRIVES OPTIONS The SBC supports multiple ATAPI CD ROM devices and allows you to change the bo...

Page 132: ...s an option if you do not want a particular drive to be included in the boot sequence The Setup screen displays the system option 1st Drive xxxxxxxxx 2nd Drive xxxxxxxxx where xxxxxxxxx is the descrip...

Page 133: ...able lists the errors which are communicated audibly BIOS BEEP CODE TROUBLESHOOTING Beep Count Description 1 2 3 4 5 6 7 8 9 10 11 Memory refresh timer error Parity Error Main memory read write test e...

Page 134: ...ty A description of each error message appears below MEMORY ERRORS BOOT ERRORS Message Description Gate20 Error The BIOS is unable to properly control the SBC s Gate A20 function which controls access...

Page 135: ...to detect and configure IDE ATAPI devices in POST XXXXXX Hard Disk Error XXXXXX ATAPI Incompatible Messages in this format indicate that the specified device could not be properly initialized by the B...

Page 136: ...to appear when a brand new CPU is installed in an SBC with an outdated BIOS In this case the BIOS must be updated to include the Microcode Update for the new CPU NVRAM Checksum Bad NVRAM Cleared Ther...

Page 137: ...tup Utility CMOS Battery Low CMOS Battery is low This message usually indicates that the CMOS battery needs to be replaced It could also appear when the user intentionally discharges the CMOS battery...

Page 138: ...n Bootblock code Do additional chipset initialization Reenable cache Verify that flat mode is enabled Test base 512K memory Adjust policies and cache first 8MB Set stack Bootblock code is copied from...

Page 139: ...D and ATAPI CDROM Disable ATAPI hardware Jump back to checkpoint E9 Read error occurred on media Jump back to checkpoint EB Determine information about root directory of recovery media Search for pre...

Page 140: ...ler Enable IRQ 0 in PIC for system timer interrupt Traps INT1Ch vector to POSTINT1ChHandlerBlock Initialize the CPU The BAT test is being done on KBC Program the keyboard controller command byte is be...

Page 141: ...size from memory found in memory test Allocates memory for Extended BIOS Data Area from base memory Initialize NUM LOCK status and program the keyboard Typematic rate Initialize INT13 and prepare for...

Page 142: ...fferent buses and perform the following functions Reset Detect and Disable function 0 Static Device Initialization function 1 Boot Output Device Initial ization function 2 Function 0 disables all devi...

Page 143: ...ber that is being executed X can be from 0 to 7 0 1 2 3 4 5 6 7 8 Function 0 Disable all devices on the bus Function 1 Initialize static devices on the bus Function 2 Initialize output devices on the...

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