Transphorm TDINV1000P100 User Manual Download Page 13

August 3, 2017

 

transphormusa.com

 

evk0006.2

 

13 

TDINV1000P100 User Guide 

(c) PCB inner layer 2 (ground planes) and inner layer 3 (power plane)

Figure 8. PCB layers 

Probing 

There are no test points provided for probing the low-side gate or half-bridge switching node. To minimize inductance during 

measurement, the tip and the ground of the probe should be directly attached to the sensing points to minimize the sensing 

loop. For safe, reliable, and accurate measurement, a scope probe tip may be directly soldered to the low-side FET drain and a 

short ground wire soldered to the low-side FET source. See Figure 9 for an alternative that does not require soldering the probe 

tip. 

Warnings 

There is no specific protection against over-current or over-voltage on this board. The TDINV1000P100 board is for evaluation 

purposes only. 

Summary of Contents for TDINV1000P100

Page 1: ...ltered to provide a pure sinusoidal output The TDINV1000P100 KIT is for evaluation purposes only Figure 1 TDINV1000P100 inverter evaluation board The control portion of the circuit is designed around...

Page 2: ...206PSB datasheet Circuit description Refer to Figure 2 for a block diagram of the inverter circuit A detailed schematic is also available in the design files at transphormusa com pv1kit The TDINV1000P...

Page 3: ...drive pulse A is a deadtime set in the firmware Gate drivers High voltage integrated drivers supply the gate drive signals for the high and low side power transistors These are 2500V isolation driver...

Page 4: ...USB cable The isolated USB interface enables simultaneous operation of two physical ports to the microcontroller a JTAG port for debug and loading of firmware and a UART for communication with a host...

Page 5: ...pply too much force to the J2 and J3 connectors as excessive force may bend and or crack the PCB If a load is to be used connect the load to the output terminals J4 and J5 DO NOT apply too much force...

Page 6: ...iency results are shown in Figure 6 These data points correspond to efficiency measurements made in still air with 20 minutes dwell at each power level Input power from the 350VDC source and output po...

Page 7: ...86 TDK C49 C53 2 0 1 F C1812 C1812V104KDRACTU ROHM C1 C14 C16 C17 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C33 C34 C38 C39 C40 C42 C43 24 0 1 F C0603 06033C104JAT2A Kemet C5 C6 C7 C8 C9 5 0...

Page 8: ...uments J2 J3 J4 J5 4 KEYSTONE_7691 7691 Keystone 2 Q1 Q3 insulator SP2000 0 015 00 54 Bergquist 2 Q2 Q4 insulator 53 77 9G Aavid Thermalloy C11 1 MKP1848622454P4 MKP1848622454P4 MKP1848622454P4 Vishay...

Page 9: ...August 3 2017 transphormusa com evk0006 2 9 TDINV1000P100 User Guide...

Page 10: ...August 3 2017 transphormusa com evk0006 2 10 TDINV1000P100 User Guide...

Page 11: ...August 3 2017 transphormusa com evk0006 2 11 TDINV1000P100 User Guide Figure 7 Detailed circuit schematics...

Page 12: ...August 3 2017 transphormusa com evk0006 2 12 TDINV1000P100 User Guide a PCB top layer b PCB bottom layer...

Page 13: ...and the ground of the probe should be directly attached to the sensing points to minimize the sensing loop For safe reliable and accurate measurement a scope probe tip may be directly soldered to the...

Page 14: ...August 3 2017 transphormusa com evk0006 2 14 TDINV1000P100 User Guide Figure 9 Low inductance probing of fast high voltage signals...

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