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August 3, 2017
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TDINV1000P100 User Guide
(c) PCB inner layer 2 (ground planes) and inner layer 3 (power plane)
Figure 8. PCB layers
Probing
There are no test points provided for probing the low-side gate or half-bridge switching node. To minimize inductance during
measurement, the tip and the ground of the probe should be directly attached to the sensing points to minimize the sensing
loop. For safe, reliable, and accurate measurement, a scope probe tip may be directly soldered to the low-side FET drain and a
short ground wire soldered to the low-side FET source. See Figure 9 for an alternative that does not require soldering the probe
tip.
Warnings
There is no specific protection against over-current or over-voltage on this board. The TDINV1000P100 board is for evaluation
purposes only.