TQ-Systems TQMa8Xx Preliminary User'S Manual Download Page 12

 

Preliminary User's Manual  l  TQMa8Xx UM 0002  l  © 2018, TQ-Systems GmbH 

 

Page  8 

 

3.1.3

 

Connector X2 

Table 3: 

Pinout connector X2 

Ball 

I/O 

Level 

Group 

Signal 

Pin 

Signal 

Group 

Level 

I/O 

Ball 

– 

3.3 V 

Power 

V_3V3_IN 

V_3V3_IN 

Power 

3.3 V 

– 

– 

3.3 V 

Power 

V_3V3_IN 

V_3V3_IN 

Power 

3.3 V 

– 

– 

3.3 V 

Power 

V_3V3_IN 

V_3V3_IN 

Power 

3.3 V 

– 

– 

0 V 

Ground 

GND 

GND 

Ground 

0 V 

– 

– 

0 V 

Ground 

GND 

10 

GND 

Ground 

0 V 

– 

– 

1.8 V 

Power 

V_1V8_OUT

2

 

11 

12 

V_1V8_OUT

2

 

Power 

1.8 V 

– 

AJ31 

1.8 V 

CONFIG 

BOOT_MODE0 

13 

14 

GND 

Ground 

0 V 

– 

AK32 

1.8 V 

CONFIG 

BOOT_MODE1 

15 

16 

MCLK_OUT0 

CLK 

1.8 V 

L29 

AL31 

1.8 V 

CONFIG 

BOOT_MODE2 

17 

18 

MCLK_IN1 

CLK 

1.8 V 

M28 

AJ29 

1.8 V 

CONFIG 

BOOT_MODE3 

19 

20 

MCLK_IN0 

CLK 

1.8 V 

G35 

– 

1.8 V 

Power 

V_1V8_ANA 

21 

22 

GND 

Ground 

0 V 

– 

– 

3 V 

Power 

LICELL 

23 

24 

GPIO3_IO05 

GPIO 

1.8 V 

I/O 

AP26 

– 

1.8 V 

CONFIG 

PMIC_FSOB_EWARN 

25 

26 

GPIO3_IO06 

GPIO 

1.8 V 

I/O 

AM24 

AR31 

1.8 V 

CONFIG 

PMIC_PWRON 

27 

28 

SCU_UART_RX 

SCU UART 

1.8 V 

AF28 

– 

0 V 

Ground 

GND 

29 

30 

SCU_UART_TX 

SCU UART 

1.8 V 

AH30 

AM22 

1.8 V 

CSI 

MIPI_CSI_DN0 

31 

32 

RESET_IN# 

CONFIG 

3.0 V 

AG31 

AP22 

1.8 V 

CSI 

MIPI_CSI_DP0 

33 

34 

RESET_OUT# 

CONFIG 

3.0 V 

– 

– 

0 V 

Ground 

GND 

35 

36 

GND 

Ground 

0 V 

– 

AM20 

1.8 V 

CSI 

MIPI_CSI_DN1 

37 

38 

I2C2_SCL 

I2C 

1.8 V 

I/O 

AD30 

AP20 

1.8 V 

CSI 

MIPI_CSI_DP1 

39 

40 

I2C2_SDA 

I2C 

1.8 V 

I/O 

AF34 

– 

0 V 

Ground 

GND 

41 

42 

GND 

Ground 

0 V 

– 

AN23 

1.8 V 

CSI 

MIPI_CSI_DN2 

43 

44 

SPI3_SCK 

SPI 

1.8 V 

H32 

AR23 

1.8 V 

CSI 

MIPI_CSI_DP2 

45 

46 

SPI3_SDO 

SPI 

1.8 V 

F34 

– 

0 V 

Ground 

GND 

47 

48 

SPI3_SDI 

SPI 

1.8 V 

G33 

AN19 

1.8 V 

CSI 

MIPI_CSI_DN3 

49 

50 

SPI3_CS0# 

SPI 

1.8 V 

J31 

AR19 

1.8 V 

CSI 

MIPI_CSI_DP3 

51 

52 

SPI3_CS1# 

SPI 

1.8 V 

K30 

– 

0 V 

Ground 

GND 

53 

54 

PMIC_AMUX_VSD 

CONFIG 

– 

– 

AN21 

1.8 V 

CSI 

MIPI_CSI_CLKN 

55 

56 

GND 

Ground 

0 V 

– 

AR21 

1.8 V 

CSI 

MIPI_CSI_CLKP 

57 

58 

MIPI_CSI_MCLK 

CSI 

1.8 V 

AN25 

– 

0 V 

Ground 

GND 

59 

60 

GND 

Ground 

0 V 

– 

AN15 

1.8 V 

DSI / LVDS 

MIPI_DSI1_DN0 

61 

62 

MIPI_DSI0_DN0 

DSI / LVDS 

1.8 V 

AJ21 

AR15 

1.8 V 

DSI / LVDS 

MIPI_DSI1_DP0 

63 

64 

MIPI_DSI0_DP0 

DSI / LVDS 

1.8 V 

AK22 

– 

0 V 

Ground 

GND 

65 

66 

GND 

Ground 

0 V 

– 

AN17 

1.8 V 

DSI / LVDS 

MIPI_DSI1_DN1 

67 

68 

MIPI_DSI0_DN1 

DSI / LVDS 

1.8 V 

AJ17 

AR17 

1.8 V 

DSI / LVDS 

MIPI_DSI1_DP1 

69 

70 

MIPI_DSI0_DP1 

DSI / LVDS 

1.8 V 

AK18 

– 

0 V 

Ground 

GND 

71 

72 

GND 

Ground 

0 V 

– 

AM14 

1.8 V 

DSI / LVDS 

MIPI_DSI1_DN2 

73 

74 

MIPI_DSI0_DN2 

DSI / LVDS 

1.8 V 

AJ23 

AP14 

1.8 V 

DSI / LVDS 

MIPI_DSI1_DP2 

75 

76 

MIPI_DSI0_DP2 

DSI / LVDS 

1.8 V 

AK24 

– 

0 V 

Ground 

GND 

77 

78 

GND 

Ground 

0 V 

– 

AM18 

1.8 V 

DSI / LVDS 

MIPI_DSI1_DN3 

79 

80 

MIPI_DSI0_DN3 

DSI / LVDS 

1.8 V 

AJ15 

AP18 

1.8 V 

DSI / LVDS 

MIPI_DSI1_DP3 

81 

82 

MIPI_DSI0_DP3 

DSI / LVDS 

1.8 V 

AK16 

– 

0 V 

Ground 

GND 

83 

84 

GND 

Ground 

0 V 

– 

AM16 

1.8 V 

DSI / LVDS 

MIPI_DSI1_CLKN 

85 

86 

MIPI_DSI0_CLKN 

DSI / LVDS 

1.8 V 

AJ19 

AP16 

1.8 V 

DSI / LVDS 

MIPI_DSI1_CLKP 

87 

88 

MIPI_DSI0_CLKP 

DSI / LVDS 

1.8 V 

AK20 

– 

0 V 

Ground 

GND 

89 

90 

GND 

Ground 

0 V 

– 

AK26 

I/O 

1.8 V 

SCU GPIO 

GPIO3_IO00 

91 

92 

GPIO3_IO02 

SCU GPIO 

1.8 V 

I/O 

AP28 

AM26 

I/O 

1.8 V 

SCU GPIO 

GPIO3_IO01 

93 

94 

GPIO3_IO03 

SCU GPIO 

1.8 V 

I/O 

AR27 

– 

0 V 

Ground 

GND 

95 

96 

GND 

Ground 

0 V 

– 

AK10 

1.8 V 

QSPI 

QSPIB_DQS 

97 

98 

SAI1_TXC 

SAI 

1.8 V 

Y34 

– 

0 V 

Ground 

GND 

99 

100 

SAI1_TXFS 

SAI 

1.8 V 

Y32 

AR11 

1.8 V 

QSPI 

QSPIB_SCLK 

101 

102 

SAI1_TXD 

SAI 

1.8 V 

AA33 

– 

0 V 

Ground 

GND 

103 

104 

GND 

Ground 

0 V 

– 

AM10 

I/O 

1.8 V 

QSPI 

QSPIB_DATA0 

105 

106 

SAI1_RXC 

SAI 

1.8 V 

AA31 

AL9 

I/O 

1.8 V 

QSPI 

QSPIB_DATA1 

107 

108 

SAI1_RXFS 

SAI 

1.8 V 

AB34 

AJ11 

I/O 

1.8 V 

QSPI 

QSPIB_DATA2 

109 

110 

SAI1_RXD 

SAI 

1.8 V 

AA35 

AM8 

I/O 

1.8 V 

QSPI 

QSPIB_DATA3 

111 

112 

GPIO3_IO07 

GPIO 

1.8 V 

I/O 

AP24 

AH10 

1.8 V 

QSPI 

QSPIB_SS0# 

113 

114 

GPIO3_IO08 

GPIO 

1.8 V 

I/O 

AR25 

AJ9 

1.8 V 

QSPI 

QSPIB_SS1# 

115 

116 

I2C1_SDA 

I2C 

1.8 V 

I/O 

AE35 

AK12 

1.8 V 

QSPI 

QSPIA_SS1# 

117 

118 

I2C1_SCL 

I2C 

1.8 V 

I/O 

AD32 

– 

0 V 

Ground 

GND 

119 

120 

GND 

Ground 

0 V 

– 

 

                                                                            

2: 

Maximum load on pins 11 and 12 is 1 A.

 

Summary of Contents for TQMa8Xx

Page 1: ...TQMa8Xx Preliminary User s Manual TQMa8Xx UM 0002 23 09 2018...

Page 2: ...s 6 3 1 1 Pin multiplexing 6 3 1 2 Connector X1 7 3 1 3 Connector X2 8 3 1 4 Connector X3 9 3 2 System components 10 3 2 1 i MX 8X CPU 10 3 2 1 1 i MX 8X derivatives 10 3 2 1 2 i MX 8X errata 10 3 2 1...

Page 3: ...nagement 21 4 7 Structural requirements 21 4 8 Notes of treatment 21 5 SOFTWARE 21 6 SAFETY REQUIREMENTS AND PROTECTIVE REGULATIONS 22 6 1 EMC 22 6 2 ESD 22 6 3 Operational safety and personal securit...

Page 4: ...ents 27 ILLUSTRATION DIRECTORY Illustration 1 Block diagram i MX 8X CPU 4 Illustration 2 Block diagram TQMa8Xx 6 Illustration 3 Block diagram DDR3L interface 11 Illustration 4 Block diagram eMMC inter...

Page 5: ...brand and trademarks are rightly protected by a third party 1 3 Disclaimer TQ Systems GmbH does not guarantee that the information in this Preliminary User s Manual is up to date correct complete or...

Page 6: ...mportant details or aspects for working with TQ products Command A font with fixed width is used to denote commands contents file names or menu items 1 7 Handling and ESD tips General handling of your...

Page 7: ...urer s specifications of the components used for example CompactFlash cards are to be taken note of They contain if applicable additional information that must be taken note of for safe and reliable o...

Page 8: ...ustration 1 Block diagram i MX 8X CPU Source NXP The TQMa8Xx extends the TQ Systems GmbH product range and offers an outstanding computing performance A suitable i MX 8X derivative i MX 8DualX i MX 8D...

Page 9: ...EEPROM Temperature sensor RTC optional Supervisor with Reset structure Power supply by PMIC with Power Sequencing single 3 3 V supply Boot configuration Three connectors 2 120 pins 1 40 pins The foll...

Page 10: ...ble 4 refers to the corresponding BSP provided by TQ Systems GmbH in combination with the MBa8Xx The electrical and pin characteristics are to be taken from the i MX 8X Data Sheet 1 the i MX 8X Refere...

Page 11: ...T 1 8 V O H24 P 0 V Ground GND 55 56 GND Ground 0 V P B30 I 1 8 V ENET ENET0_RX_CTL 57 58 ENET0_TX_CTL ENET 1 8 V O A29 P 0 V Ground GND 59 60 GND Ground 0 V P A31 I 1 8 V ENET ENET0_RXD0 61 62 ENET0_...

Page 12: ...8 V O AN25 P 0 V Ground GND 59 60 GND Ground 0 V P AN15 O 1 8 V DSI LVDS MIPI_DSI1_DN0 61 62 MIPI_DSI0_DN0 DSI LVDS 1 8 V O AJ21 AR15 O 1 8 V DSI LVDS MIPI_DSI1_DP0 63 64 MIPI_DSI0_DP0 DSI LVDS 1 8 V...

Page 13: ...O 1 8 V GPIO GPIO1_IO26 15 16 CAN0_RX CAN 1 8 V I AB32 P 0 V Ground GND 17 18 CAN0_TX CAN 1 8 V O AA29 AK28 O 1 8 V TAMPER TAMPER_OUT0 19 20 CAN1_RX CAN 1 8 V I AD34 AL29 O 1 8 V TAMPER TAMPER_OUT1 21...

Page 14: ...ler SCU starts from the internal ROM Depending on the OTP fuses eFuse and the boot mode settings of the system controller the TQMa8Xx boots from the specified boot source eMMC QSPI NOR flash SD card M...

Page 15: ...k diagram DDR3L interface 3 2 2 2 eMMC NAND flash An eMMC is available on the TQMa8Xx as non volatile memory for programs and data e g bootloader operating system application The following illustratio...

Page 16: ...QS QSPIA_SS 1 0 _B C1 QSPIA_SCLK QSPIB_DATA 3 0 QSPIB_SS 1 0 _B QSPIB_SCLK S1 S2 C2 QSPIA_SS1 QSPIB_SCLK QSPIB_DQS QSPIB_DATA 3 0 QSPIB_SS 1 0 QSPIB_DQS Illustration 5 Block diagram QSPI interface 3 2...

Page 17: ...the i MX 8X Illustration 7 Block diagram temperature sensor interface The EEPROM with temperature sensor D7 is assembled on the bottom side of the TQMa8Xx see Illustration 15 The overtemperature outpu...

Page 18: ...Ma8Xx connector Table 10 Reset and config signals Signal Dir Power domain Function TQMa8Xx Remark RESET_IN I VDD_ANA1_1P8 i MX 8X reset input X2 32 Low Active signal Deactivate float or connect to 1 8...

Page 19: ...380 mW 115 mA 380 mW 130 mA 429 mW Linux prompt 95 mA 314 mW 95 mA 314 mW 100 mA 330 mW Linux 100 CPU load 200 mA 660 mW 200 mA 660 mW 220 mA 726 mW Reset 26 mA 86 mW 26 mA 86 mW 21 mA 69 mW RESET_IN...

Page 20: ...supply input some TQMa8Xx internal voltages are available on the TQMa8Xx connectors The following table shows these voltages Table 14 Provided TQMa8Xx voltages Voltage TQMa8Xx Max current Usage V_1V8...

Page 21: ...2 3 2 6 9 Power modes TBD 3 2 6 10 PMIC On the TQMa8Xx the PMIC PF8100 is assembled The PF8100 is connected to a dedicated I2 C bus of the i MX 8X PMIC_I2C intended for power management Alternatively...

Page 22: ...8XXL is strongly recommended See chapter 4 8 for further information Attention Note with respect to the component placement on the carrier board 2 5 mm should be kept free on the carrier board on both...

Page 23: ...anual l TQMa8Xx UM 0002 l 2018 TQ Systems GmbH Page 19 4 2 Dimensions Illustration 11 TQMa8Xx dimensions side view Illustration 12 TQMa8Xx CPU position top view Illustration 13 TQMa8Xx dimensions top...

Page 24: ...nt placement top AK3 120 119 1 2 1 2 1 2 120 119 40 39 Illustration 15 TQMa8Xx component placement bottom The labels on the TQMa8Xx show the following information Table 18 Labels on TQMa8Xx Label Text...

Page 25: ...articularly the tolerance chain PCB thickness board warpage BGA balls BGA package thermal pad heatsink as well as the maximum pressure on the i MX 8X must be taken into consideration when connecting t...

Page 26: ...ring of all signals which can be connected externally also slow signals and DC can radiate RF indirectly 6 2 ESD In order to avoid interspersion on the signal path from the input to the protection cir...

Page 27: ...a8Xx TBD Relative humidity operating storage 10 to 90 Not condensing Detailed information concerning the thermal characteristics of the i MX 8X is to be taken from the NXP documents 1 and 2 Attention...

Page 28: ...embled on the TQMa8Xx 7 6 Packaging By environmentally friendly processes production equipment and products we contribute to the protection of our environment To be able to reuse the TQMa8Xx it is pro...

Page 29: ...de EEPROM Electrically Erasable Programmable Read only Memory EMC Electromagnetic Compatibility eMMC embedded Multimedia Card ESD Electrostatic Discharge EU European Union EuP Energy using Products GP...

Page 30: ...Interface RAM Random Access Memory REACH Registration Evaluation Authorisation and restriction of Chemicals RF Radio Frequency RFU Reserved for Future Usage RGB Red Green Blue RMII Reduced Media Inde...

Page 31: ...applicable documents No Name Rev Date Company 1 i MX 8X Data Sheet Rev C 11 2017 NXP 2 i MX 8X Reference Manual NXP 3 i MX 8X Chip Errata NXP 4 Power management integrated circuit PF8100 Rev 2 0 26 Ja...

Page 32: ...TQ Systems GmbH M hlstra e 2 l Gut Delling l 82229 Seefeld Info TQ Group TQ Group...

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