Preliminary User's Manual l MBLS1012AL UM 0001 l © 2019, TQ-Systems GmbH
Page 19
4.2.13
USB
TQMLS1012AL
USB
Type A
USB 3.0 Hub
USB
Type A
USB 3.0
USB1
USB2
USB3
USB4
I2C
WLAN Slot
Mini PCIe
Illustration 19:
Block diagram USB 3.0
The TI USB 3.0 hub TUSB8041 is used for the USB 3.0 OTG port of the TQMLS1012A to provide various USB hosts. The OTG port is
configured as host. The output ports are USB 3.0 ports, but can also be used as USB 2.0 ports.
Of the four available ports, two are USB 3.0 ports and are connected to the stacked connector (X6). The remaining two ports are
connected as USB 2.0 to the two Mini PCIe slots. 0 Ω bridges for the I
2
C interface are provided for optional access to the internal
hub registers. The I
2
C address can be taken from Table 13.
A power distribution switch provides the 5 V supply for the USB connectors. The components used have current monitoring and
can switch off the bus voltage in the event of overload and/or overheating.
Table 22 shows the wiring of the unused USB pins of the CPU.
Table 22:
Unused CPU USB pins
Pin
Name
Target pin / Net
Remark
TP62
USB_VBUS
VCC5V5
0 Ω series resistor
TP54
USB1_PWRFAULT
GND
1 kΩ Pull-Down
The USB host port of the TQMLS1012AL provides a theoretical data rate of 5 Gbit/s (gross). This is divided among the connected
ports. Depending on the software and hardware used, the effective read and write rates of the ports may vary.
Table 23:
Characteristics USB-Host
Parameter
Min.
Typ.
Max.
Unit
Remark
Voltage
4.75
5
5.25
V
Preliminary values, not qualified
Current
0.89
1.02
1.143
A
Per channel. Preliminary values, not qualified
Drop during load jump
–
TBD
–
mV
Switching on a 900 mA load
Read rate
–
TBD
4,000
Mbit/s
USB-HDD at Port 2; 2 GB file; 10 MB block size
Write rate
–
TBD
4,000
Mbit/s
USB-HDD at Port 2; 2 GB file; 10 MB block size
Illustration 20:
Position of USB 3.0 stacked socket X6
