TXZ+ Family
TMPM4G Group(1)
Clock Control and Operation Mode
2021-06-30
Rev. 1.1
50 / 88
Information according to product
The information about
[CGFSYSENA]
,
[CGFSYSMENA]
,
[CGFSYSMENB]
,
[CGFSYSMENC]
and
[CGFCEN]
which is different according to each product is shown below.
[CGFSYSENA]
Table 1.13
[CGFSYSENA]
register corresponding to each product
Bit
Bit Symbol Internal connection
peripheral circuit
Channel No./
Port name
M4GR
M4GQ
M4GN
31
IPENA31
-
-
x
x
x
30
IPENA30
-
-
x
x
x
29
IPENA29
-
-
x
x
x
28
IPENA28
-
-
x
x
x
27
IPENA27
-
-
x
x
x
26
IPENA26
-
-
x
x
x
25
IPENA25
-
-
x
x
x
24
IPENA24
-
-
x
x
x
23
IPENA23
-
-
x
x
x
22
IPENA22
-
-
x
x
x
21
IPENA21
-
-
x
x
x
20
IPENA20
-
-
x
x
x
19
IPENA19
-
-
x
x
x
18
IPENA18
-
-
x
x
x
17
IPENA17
-
-
x
x
x
16
IPENA16
-
-
x
x
x
15
IPENA15
-
-
x
x
x
14
IPENA14
-
-
x
x
x
13
IPENA13
-
-
x
x
x
12
IPENA12
-
-
x
x
x
11
IPENA11
-
-
x
x
x
10
IPENA10
-
-
x
x
x
9
IPENA09
TSPI
5
x
8
IPENA08
4
7
IPENA07
3
6
IPENA06
2
5
IPENA05
1
4
IPENA04
0
3
IPENA03
EBIF
-
2
IPENA02
SMIF
0
1
IPENA01
HDMAC
B
0
IPENA00
A