TXZ Family
Comparator
2017-10-11
9 / 14
Rev. 1.0
Operation description
3.
3.1. Clock supply
When you use COMP, please set an applicable clock enable bit to "1" (clock supply) in fsys supply stop register A
(
[CGFSYSENA]
,
[CGFSYSMENA]
), fsys supply stop register B (
[CGFSYSENB]
,
[CGFSYSMENB]
), and fc
supply stop registers (
[CGFCEN]
).
An applicable register and the bit position vary according to a product. Therefore, the register may not exist
with the product. Please refer to "Clock Control and Operation Mode" of the reference manual for the details.
3.2. Operation
1.
Set up digital to analog converter used as reference voltage of COMP.
A conversion value is set to a
[DA0REG]
register, and
[DA0CR]
<EN> is set to “1”. The voltage
corresponding to a conversion value is outputted and it is inputted into a comparator as reference voltage.
Please operate “2.” after waiting for the stable time (t
sta
:4.5μs) of DAC0 output.
Clear “0” to
[DA0CR]
<EN> then DAC channel 0 stops operation and the output of DAC0 becomes Hi-z.
Please stop the comparator before stopping DAC channel 0.
Please refer to “8-bit Digital to Analog Converter” of the reference manual for detail.
2.
Select voltage to compare and compare with reference voltage.
Select input voltage to compare by
[CMPCR]
<CMPISEL>. Next, set "1" to
[CMPCR]
<CMPEN>, then the
comparator starts operation. Please operate “3.” after waiting for comparator enabling time (T
sta
:5μs).
When input voltage compare exceeds reference voltage, COMP output will be set to “1”. Clear "0"
to
[CMPCR]
<CMPEN>, a comparator stops operation and a COMP output is clear to “0”.
3.
Set up A-PMD input.
Set “1” to
[PMDxEMGCR]
<CPAIEN>(enable input from comparator). Please refer to “Advanced
Programmable Motor Control Circuit” of the reference manual for the details.
Note1: When use a comparator, DAC0 terminal must be open (Hi-z state).
Note2: Regardless to operation/stop of DAC channel 0, do not input voltage from DAC0 terminal.
Note3: VREFH is AVDD5 and VREFL is AVSS of 8-bit digital to analog converter.