RD014-RGUIDE-01
2018-03-15
Rev. 1
17
/
19
© 2018
Toshiba Electronic Devices & Storage Corporation
6.2. External view and pin assignment
Figure 6.1 External view, marking, and pin assignment of the TLP7820
6.3. Internal block diagram
Note: Add 0.1μF bypass capacitors between Pin 1 and Pin 4 and between Pin 5 and
Pin 8.
Figure 6.2 Internal block diagram of the TLP7820
External view and marking
Pin assignment
Pin No. Symbol
Description
1
V
DD1
Input side supply voltage
2
V
IN+
Positive input
3
V
IN-
Negative input
4
GND1 Input side ground
5
GND2 Output side ground
6
V
OUT-
Negative output
7
V
OUT+
Positive output
8
V
DD2
Output side supply voltage
