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RD030-RGUIDE-02
2019-05-08
Rev.2
8
/
18
© 2019
Toshiba Electronic Devices & Storage Corporation
Figure
3.3
shows the V
OUT
-I
OUT
curves of the
TCR15A
G12 (V
OUT
=1.2V) at different V
BIAS
voltages.
As shown in Figure
3.3, when the V
BIAS
pin is 3.3V or higher, the
TCR15AG12
maintains low-dropout
performance over the entire output current range of up to 1.5A. The minimum V
BIAS
voltage shown
in the datasheet is a voltage at which the functional operation of the
TCR15AG12
is guaranteed
under the specified test conditions. Care should be taken as to variations in performance depending
on the V
BIAS
voltage. The minimum V
BIAS
voltage specified in the datasheet is 2.6V when V
OUT
=1.2V.
The dashed curve shows the V
OUT
-I
OUT
characteristics when V
BIAS
=2.6V. In contrast, the solid line
shows the V
OUT
-I
OUT
performance when V
BIAS
=
3
.
3
V. Compared to the solid line, the V
OUT
-I
OUT
curve
at V
BIAS
=2.6V begins to decline at an I
OUT
around 0.5A.
Therefore, for systems requiring a current
of 0.5A or more, a 3.3V or higher power supply should be applied to the V
BIAS
pin. However, this
causes some design concerns. For example, depending on the system configuration, a long power
supply line might need to run around a board, making it susceptible to noise. Another concern is
that a system might be unable to supply enough power to the V
BIAS
pin. Generally, the impact of a
long and complex power supply line can be fixed by adding a 1μF capacitor to the V
BIAS
pin as shown
in Figure 2.1 or selecting an optimal capacitor while checking the output waveform from an actual
system board. In order to ensure output voltage regulation, a 1μF or larger capacitor should be
placed even if V
BIAS
is free from noise. Since the sink current (I
BIAS
) running into the V
BIAS
pin is
roughly 20μA at the maximum as shown in Figure 3.4, it is usually unnecessary to be concerned
about a voltage drop caused by an insufficient power supply to the V
BIAS
pin.
Figure 3.4 I
BIAS
-V
BIAS
curves
If the power supply to the V
BIAS
pin is connected to other loads in parallel, a sudden change in any
of their load currents could cause sudden drop the V
BIAS
voltage. In order to maintain the V
BIAS
pin
at a proper voltage even in this situation, a 1μF or greater capacitor should be placed to the V
BIAS
pin as shown in Figure 2.1.
V
BIAS
(V)
I
BI
AS
(A
)