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Toshiba HDD2155 Product Specification Download Page 73

360014937 

Copyright © 2000 Toshiba corporation. All rights reserved. 

                   

-

 573 - 

10.8.23  Identify Device  (ECh) 

 

COMMAND CODE 

1 1 1 0 1 1 0 0

 

REGISTER 

 

REGISTER SETTING 

NORMAL COMPLETION 

DR 

drive no. 

no change 

CY  

no 

change 

HD  

no 

change 

SN  

no 

change 

SC  

00H 

FT  

no 

change 

 

 

The identify device command requests the drive to transfer parameter information to the host.    When the 
command is issued, the drive sets BSY, stores the required parameter information in the sector buffer, sets 
the DRQ bit, and issues an interrupt. The host may read the parameter information of the sector buffer.    The 
parameter words in the buffer are arranged as shown in Table10.8.23-1

〜

3. 

 
 

Summary of Contents for HDD2155

Page 1: ...Storage Device Division TOSHIBA MK6017MAP HDD2155 HARD DISK DRIVE PRODUCT SPECIFICATION Rev 00 October 2000 DOCUMENT NUMBER 14603 ...

Page 2: ... ＴＯＳＨＩＢＡ ＴＩＴＬＥ 2 5 inch Disk Drives MK6017MAP Product Specification REV No 日 付 DATE 記 事 CONTENTS 部 門 DEP 担 当 REVISED 承 認 APP D 保 管 日 STGE PER 00 2000 10 06 Initial issue D SETSU2 A Iwata M Hattori No ３６００１４９３７ ３６００１４９３７ ３６００１４９３７ ３６００１４９３７ ＴＯＳＨＩＢＡ ＣＯＲＰＯＲＡＴＩＯＮ CONT ON 503 PAGE No 502 ...

Page 3: ...refully reviewed Indicates a potentially hazardous situation which if not avoided may result in minor injury or property damage NOTE Gives you helpful information Toshiba Corporation shall not be liable for any damage due to the fault or negligence of users fire earthquake or other accident beyond the control of Toshiba Corporation Toshiba Corporation shall not be liable for any incidental or cons...

Page 4: ...safe maintenance of public function etc special consideration 3 must be given with regard to operation maintenance and management of the system 2 A system including equipment linked with human safety or having a serious influence on the safe maintenance of public function etc corresponds to the following A main equipment control system used in atomic power plants a safety protection based system u...

Page 5: ... disassemble remodel or repair Disassembly remodeling or repair may cause injury failure or data loss Do not drop Dropping may cause injury Do not touch sharp edges or pins of the drive Sharp protrusions etc may cause injury Hold the drive by both sides when carrying it SAFETY ...

Page 6: ...ual etc of the system in which this device is used and ensure that users are made thoroughly aware of it Inserting or pulling out the drive when the power is turned on may cause damage to the drive Exchange the drive etc after the power of HDD is turned off Extreme shock to the drive may cause damage to it data corruption etc Do not subject the drive to extreme shock such as dropping upsetting or ...

Page 7: ...TEMPERATURE AND HUMIDITY 522 8 1 1 Temperature 522 8 1 2 Humidity 522 8 2 VIBRATION 522 8 3 SHOCK 522 8 4 ALTITUDE 523 8 5 ACOUSTICS SOUND POWER 523 8 6 SAFETY STANDARDS 523 8 7 EMC ADAPTABILITY 523 9 RELIABILITY 524 9 1 ERROR RATE 524 9 1 1 Non Recoverable Error Rate 524 9 1 2 Seek Error Rate 524 9 2 MEAN TIME TO FAILURE MTTF 524 9 3 PRODUCT LIFE 524 9 4 REPAIR 524 9 5 PREVENTIVE MAINTENANCE PM 5...

Page 8: ...register 558 10 8 COMMAND DESCRIPTIONS 559 10 8 1 Nop 00h 560 10 8 2 Recalibrate 1xh 560 10 8 3 Flush Cache E7h 560 10 8 4 Read Sector 20h 21h 561 10 8 5 Read Long 22h 23h 561 10 8 6 Write Sector 30h 31h 561 10 8 7 Write Long 32h 33h 562 10 8 8 Read Verify 40h 562 10 8 9 Write Verify 3Ch 562 10 8 10 Format Track 50h 563 10 8 11 Seek 7xh 564 10 8 12 Toshiba Specific 564 10 8 13 Execute Diagnostics ...

Page 9: ... values 613 10 10 3 SMART function default setting 613 10 11 ADAPTIVE POWER MODE CONTROL 614 10 11 1 Performance Idle 614 10 11 2 Active Idle 614 10 11 3 Low Power Idle 614 10 11 4 Transition time 614 10 12 RESET 615 10 13 MASTER SLAVE CONFIGURATION 616 10 14 CACHE MEMORY 617 10 14 1 Cache Operations 617 10 14 2 Notes for write cache 617 10 15 AUTOMATIC WRITE REALLOCATION 617 11 PROTOCOL 618 11 1 ...

Page 10: ...IMENSIONS 520 TABLE 10 3 1 SIGNAL PIN ASSIGNMENT 529 TABLE 10 3 2 SIGNAL TREATMENT 530 TABLE 10 6 1 REGISTER MAP 549 TABLE 10 6 2 DECODE LOGIC 549 TABLE 10 7 1 DIAGNOSTIC MODE ERROR REGISTER 552 TABLE 10 7 2 COMMAND CODE 557 TABLE 10 8 1 IDENTIFY INFORMATION 574 TABLE 10 8 2 IDENTIFY INFORMATION CONTINUED 575 TABLE 10 8 3 IDENTIFY INFORMATION CONTINUED 576 TABLE 10 8 4 IDENTIFY INFORMATION CONTINU...

Page 11: ...k Assembly and a printed circuit board The HDA has a sealed module which contains a disk spindle assembly a head actuator assembly and an air filtration system This HDA adopts Winchester technology which enhances high reliability The actuator is a rotary voice coil motor which enables high speed access The disk is driven directly by a DC spindle motor Air filtration is provided by a high performan...

Page 12: ...tc without exception in order to prevent loss etc in cases where data loss may result in loss or damage Do not touch the top cover since application of force to it may cause damage to the drive Do not stack the drive on another drive or on other parts etc or stack them on top of it during storage or transportation Shock or weight may cause parts distortion etc Labels and the like attached to the d...

Page 13: ...e supported Ultra66 supported Quick address conversion in translation mode Translation mode which enables any drive configuration LBA Logical Block Address mode Single Multi word DMA Ultra DMA modes and Advanced PIO mode supported Data integrity Automatic retries and corrections for read errors 368 bit computer generated ECC polynomial with 17 bit five burst and 113 bit single burst on the fly err...

Page 14: ...P Formatted Capacity gigabytes 6 007 Servo design method Sector Servo Recording method 32 34 TC MEEPR4 PP Recording density Track mm TPI 1667 42 3k Bit mm BPI 20 8k 528k max Flux change mm FRPI 22 1k 561k max Number of disks 1 Number of data heads 1 Number of user data cylinders 24 800 Bytes per sector 512 ...

Page 15: ...the condition of normal voltage 25oC normal temperature and bottom side down 2 Average time to seek all possible adjacent track without head switching 3 Weighted average time to travel between all possible combination of track calculated as below Weighted average access time Sum of P n t n Sum of P n n 1 to N Where N Total number of tracks P n Total number of seek for stroke n 2 N n t n Average se...

Page 16: ...the specified conditions note 5 Only when motor start retry it may last for 2 seconds note 6 Peak value during seek operation note 7 The seek average current is specified based on three operations per 100 ms note 8 The read write current is specified based on three operations of 63 sector read write per 100 ms note 9 Motor is rotating at normal speed but heads are unloaded on the ramp 6 3 Energy C...

Page 17: ... to avoid damage to the drive when handling it The drive uses parts susceptible to damage due to ESD electrostatic discharge Wear ESD proof wrist strap in accordance with the usage specified when handling a drive that is not in an anti static protection bag Extreme shock to the drive may cause damage to it data corruption etc Do not subject the drive to extreme shock such as dropping upsetting or ...

Page 18: ...r spins up frequently the temperature of the top cover may rise to 15 maximum If the drive is used in ambient temperature of 45 or more it should be kept where adequate ventilation is available to keep the temperature of top cover under 60 M3 mounting screw holes are tapped directly on the base for electrical grounding between the drive and the base In order to prevent the drive performance from b...

Page 19: ...360014937 Copyright 2000 Toshiba corporation All rights reserved 519 Figure 1 MK6017MAP Dimensions UNIT mm ...

Page 20: ...0 05 0 002 A17 0 50 0 020 A18 0 05 0 002 A21 3 86 0 152 A22 0 20 0 008 A23 3 00 0 118 A26 M3 N A A28 4 07 0 160 A29 61 72 2 430 61 72 0 30 2 430 0 012 A32 M3 N A A34 1 00 min 0 039 min A35 8 00 max 0 315 max A36 60 20 min 2 370 min A37 8 00 0 315 5 00 0 197 A38 3 00 min 0 118 min 3 50 min 0 137 min A41 2 50 min 0 980 min 3 50 min 0 137 min A50 14 00min 0 551min 14 00 0 30 0 551 0 012 A51 90 60min ...

Page 21: ...360014937 Copyright 2000 Toshiba corporation All rights reserved 521 Figure 2 Mounting Recommendation ...

Page 22: ... original shipping package Max wet bulb 29oC Operating 40oC Non operating 8 2 Vibration Operating 9 8 m s2 1 0G 5 500 Hz Sine wave sweeping 1 oct minute No unrecoverable error Non operating 25 4 mm p p displacement 5 10 Hz No unrecoverable error 49 m s2 5 0G 10 500 Hz Sine wave sweeping 1 oct minute No unrecoverable error 8 3 Shock Operating 1 470 m s2 150G 2 msec half sine wave Repeated twice max...

Page 23: ...on Measurements are to be taken in accordance with ISO 7779 8 6 Safety Standards The drive satisfies the following standards Underwriters Laboratories UL 1950 Canadian Standard Association CSA C22 2 No 950 TUV Rheinland EN 60 950 8 7 EMC Adaptability The drive satisfies the following standards EN50081 1 EN55022 1994 Class B EN61000 3 2 1995 EN61000 3 3 1995 EN50082 1 EN61000 4 2 1995 EN61000 4 3 1...

Page 24: ...by a retry including recalibration 9 2 Mean Time to Failure MTTF A failure means that the drive can not execute the function defined in this document under the nominal temperature humidity and the other conditions specified in this document Damages caused by operation mistake mishandling system failure and other damages occurred under the conditions which are not described in this document are not...

Page 25: ...ad Unload can be performed by a command Unload is executed by the following commands Soft Reset Standby Standby Immediate Sleep If the power supply is cut when the head is on a media Emergency Unload is performed by routing the back EMF of SPM to the voice coil In this case Emergency Unload is performed 20 000 times maximum Emergency Unload should be used only when the host system cannot perform n...

Page 26: ...tension ATA 4 T13 1153D Revision 17 October 30 1997 Information technology AT Attachment with Packet Interface 5 Interface 5 ATA 5 T13 1321D Revision 2 December 13 1999 10 1 Cabling 10 1 1 Interface Connector Drive side connector Yamaichi GAP050K11617 or equivalent Recommended host side connector for board straight type Berg 86455 044 86456 044 or equivalent for cable Berg 89361 044 or equivalent ...

Page 27: ...t value voltage high note 1 V 2 0 to supply voltage 0 5 low V 0 3 to 0 8 leak current µA 10 note 2 As non connected logic voltage input voltage level is from 0 3V to 0 5V note 1 The max input range of signal is from 0 3V to supply voltage 0 5V note 2 Except for signal lines pulled up as shown in Table 10 3 3 1 10 2 2 2 Output item unit value note voltage high V 2 4 min IOH 1mA low V 0 4 max 0 4 ma...

Page 28: ...360014937 Copyright 2000 Toshiba corporation All rights reserved 528 10 3 Interface connector 10 3 1 ATA interface connector Figure 3 ATA interface connector Polarity key 43 44 1 2 2 00 2 00 24 48 00 ...

Page 29: ...4 DD 8 5 DD 6 6 DD 9 7 DD 5 8 DD 10 9 DD 4 10 DD 11 11 DD 3 12 DD 12 13 DD 2 14 DD 13 15 DD 1 16 DD 14 17 DD 0 18 DD 15 19 GROUND 20 KEY 21 DMARQ 22 GROUND 23 DIOW 24 GROUND STOP 25 DIOR 26 GROUND DMARDY HSTROBE 27 IORDY 28 CSEL DMARDY DSTROBE 29 DMACK 30 GROUND 31 INTRQ 32 IOCS16 33 DA 1 34 PDIAG CBLID 35 DA 0 36 DA 2 37 CS0 38 CS1 39 DASP 40 GROUND 41 5V LOGIC 42 5V MOTOR 43 GROUND 44 RESERVED N...

Page 30: ...resistor CS0 and CS1 are also pulled up for better noise immunity Table 10 3 2 Signal treatment SIGNAL Driven by TYPE By host By drive RESET host TP 10kΩPU DD 0 15 bi direction TS DMARQ drive TS 5 6 k Ω PD DIOR host TS DMARDY HSTROBE DIOW host TS STOP IORDY drive TS 1 0 k Ω PU DDMARDY DSTROBE CSEL host GND 10 k Ω PU DMACK host TP INTRQ drive TS 10 k Ω PD IOCS16 drive OD 1 0 k Ω PU 1 2 k Ω PU DA 0 ...

Page 31: ...ransfer is ready The direction of the data transfer is controlled by write read strobe signal HOST IOW or HOST IOR This signal is used on a hand shake manner with DMACK DIOW STOP O 23 Write strobe The rising clocks data from the host data bus HD0 through HD15 to a register or data register of the drive Stop signal used by the host after the completion of Ultra DMA Burst DIOR HDMARDY HSTROBE O 25 R...

Page 32: ...ta word open drain DA 1 O 33 Address line from the host system to select the registers of the drive PDIAG CBLID I O 34 In Master Slave mode this signal reports the presence of slave drive to master drive and enables transmitting of diagnostic result between master drive and slave drive DA 0 O 35 Address line from the host system to select the registers of the drive DA 2 O 36 Address line from the ...

Page 33: ...min 600 383 240 180 120 tCICSV IOCS16 valid from CS max 90 50 40 n a n a tAICSV IOCS16 valid from address max 90 50 40 n a n a tAICSI IOCS16 inactive from address max 60 45 30 n a n a tA IORDY Setup time max 35 35 35 35 35 tB IORDY Pulse Width max 1250 1250 1250 1250 1250 IOCS16 shall be specified in ATA 2 specifications For other modes this signal is invalid The Drive releases IOCS16 within the t...

Page 34: ...e Time min 600 383 240 180 120 tCICSV IOCS16 valid from CS max 90 50 40 n a n a tAICSV IOCS16 valid from address max 90 50 40 n a n a tAICSI IOCS16 inactive from address max 60 45 30 n a n a tRD Read Data Valid to IORDY min 0 0 0 0 0 tA IORDY Setup time max 35 35 35 35 35 tB IORDY Pulse Width max 1250 1250 1250 1250 1250 IOCS16 is specified in ATA 2 specifications For other modes this signal is in...

Page 35: ...IONS Transfer mode MODE 0 MODE 1 MODE 2 Symbol Meaning Min Max Min Max Min Max t0 Cycle time 960 480 240 tC DMACK to DMARQ delay 200 100 80 tD DOW 16 bit 480 240 120 tG DOW data setup 250 100 35 tH DOW data hold 50 30 20 tI DMACK to DOW setup 0 0 0 tJ DOW to DMACK hold 0 0 0 tC DMACK tG tH tJ tI DMARQ DIOW DD15 DD0 tO tD ...

Page 36: ...ODE 0 MODE 1 MODE 2 Symbol Meaning Min Max Min Max Min Max t0 Cycle time 960 480 240 tC DMACK to DMARQ delay 200 100 80 tD DIOR 16 bit 480 240 120 tE DIOR data access 250 150 60 tF DIOR data hold 5 5 5 tI DMACK to DIOR setup 0 0 0 tJ DIOR to DMACK hold 0 0 0 tS DIOR setup tD tE tD tE tD tE tC DMACK tS tF tJ tI DMARQ DIOR DD15 DD0 tO tD tE ...

Page 37: ... 1 MODE 2 Symbol Meaning Min Max Min Max Min Max t0 Cycle time 480 150 120 tC DMACK to DMARQ delay tD DIOW 16 bit 215 80 70 tG DIOW data setup 100 30 20 tH DIOW data hold 20 15 10 tI DMACK to DIOW setup 0 0 0 tJ DIOW to DMACK hold 20 5 5 tK DIOW negated pulse width 215 50 25 tL DIOW to DMARQ delay 40 40 35 tG tL DMACK tH tK tJ tI DMARQ DIOW DD15 DD0 tO tD ...

Page 38: ... Meaning Min Max Min Max Min Max t0 Cycle time 480 150 120 tC DMACK to DMARQ delay tD DIOR 16 bit 215 80 70 tE DIOR data access 150 60 50 tF DIOR data hold 5 5 5 tZ DIOR to tristate 20 25 25 tI DMACK to DIOR setup 0 0 0 tJ DIOR to DMACK hold 20 5 5 tK DIOR negated pulse width 50 50 25 tL DIOR to DMARQ delay 120 40 35 tE tL DMACK tF tK tJ tI DMARQ DIOR DD15 DD0 tO tD tZ ...

Page 39: ... All rights reserved 539 10 4 7 Ultra DMA Timing Initiating an Ultra DMA data in burst DMARQ device DMACK host STOP host HDMARDY host DSTROBE device DD 15 0 tZAD DA0 DA1 DA2 CS0 CS1 tUI tZAD tACK tACK tENV tENV tZIORDY tFS tFS tVDS tAZ tDVH tACK ...

Page 40: ...a DMA data in burst tDVH DSTROBE at device DD 15 0 at device DSTROBE at host DD 15 0 at host tDVH tCYC tCYC tDVS tDVS tDH tDS tDH tDS t2CYC tDH tDVH t2CYC Host pausing an Ultra DMA data in burst DMARQ device DMACK host STOP host HDMARDY host DSTROBE device DD 15 0 device tSR tRFS tRP ...

Page 41: ...rporation All rights reserved 541 Device terminating an Ultra DMA data in burst tAZ tIORDYZ CRC DMARQ device DMACK host STOP host HDMARDY host DSTROBE device DD 15 0 DA0 DA1 DA2 CS0 CS1 tACK tLI tMLI tDVS tLI tACK tACK tZAH tDVH tSS tLI ...

Page 42: ...oration All rights reserved 542 Host terminating an Ultra DMA data in burst tDVH CRC tAZ DMARQ device DMACK host STOP host HDMARDY host DSTROBE device DD 15 0 DA0 DA1 DA2 CS0 CS1 tACK tMLI tLI tLI tIORDYZ tACK tACK tZAH tMLI tDVS tRFS tRP ...

Page 43: ...Toshiba corporation All rights reserved 543 Initiating an Ultra DMA data out burst DMARQ device DMACK host STOP host DDMARDY device HSTROBE host DD 15 0 host DA0 DA1 DA2 CS0 CS1 tUI tACK tENV tZIORDY tLI tDVS tDVH tACK tACK tUI ...

Page 44: ... DMA data out burst tDH tDS tDVH HSTROBE at host DD 15 0 at host HSTROBE at device DD 15 0 at device tDVH tCYC tCYC tDVS tDVS tDS tDH t2CYC tDH tDVH t2CYC Device pausing an Ultra DMA data out burst DMARQ device DMACK host STOP host DDMARDY device HSTROBE host DD 15 0 host tSR tRFS tRP ...

Page 45: ... corporation All rights reserved 545 Host terminating an Ultra DMA data out burst DMARQ device DMACK host STOP host DDMARDY device HSTROBE host DD 15 0 host DA0 DA1 DA2 CS0 CS1 tACK tLI tMLI tDVS tLI tLI tACK tIORDYZ tACK CRC tDVH tSS ...

Page 46: ...poration All rights reserved 546 Device terminating an Ultra DMA data out burst DMARQ device DMACK host STOP host DDMARDY device HSTROBE host DD 15 0 host DA0 DA1 DA2 CS0 CS1 tACK tMLI tDVS tLI tLI tACK CRC tDVH tACK tIORDYZ tMLI tRP tRFS ...

Page 47: ...6 6 6 tFS First STROBE time 0 230 0 200 0 170 0 130 0 120 tLI Limit interlock time 0 150 0 150 0 150 0 100 0 100 tMLI Interlock time min 20 20 20 20 20 tUI Unlimited interlock 0 0 0 0 0 tAZ Allowed to release 10 10 10 10 10 tZAH Delay time 20 20 20 20 20 tZAD Delay time 0 0 0 0 0 tENV Envelope time 20 70 20 70 20 70 20 55 20 55 tSR Strobe to DMARDY 50 30 20 NA NA tRFS Ready to final Strobe 75 70 6...

Page 48: ...8 10 4 8 Reset Timing tM tN BUSY RESET Symbol Meaning Minimum Maximum Unit Condition tM RESET pulse width Low 25 µs tN RESET inactive to BSY active 400 ns 10 5 Grounding HDA Head Disk Assembly and DC ground ground pins on interface are connected electrically each other ...

Page 49: ...edance Not used 1 0 1 1 0 Alt status register Device control register 1 0 1 1 1 Device address register 1 Not used 1 1 X X X High impedance Not used X means don t care The host generates selection of two independent chips on the interface The selected high order chip HOST CS1 is valid only when the host is accessing the address of alternate status register digital output register and digital input...

Page 50: ...ta associated with the Identify Device command shall also be transferred to this register 10 7 1 1 Read Write command The register provides a high speed 16 bit path into the sector buffer with PIO and DMA 10 7 1 2 Read Write Long command When a Read Write Long is issued the ECC bytes are transferred by 8 bit operation 10 7 1 3 Read Write Buffer command This command provides 16 bit path between hos...

Page 51: ...edia devices and indicates that new media is available to the operating system Bit 4 IDNF ID Not Found The requested sector could not be found Bit 3 MCR Media Change Requested is reserved for use by removable media devices and indicates that a request for media removal has been detected by the device Bit 2 ABRT Aborted Command This bit Indicates that the requested command has been aborted due to t...

Page 52: ...ized by the drive internally This register is used with Set Features command 10 7 3 1 Smart command This command is used with the Smart commands to select subcommands 10 7 4 Sector Count Register CS0 DA2 DA0 2 Read Write 10 7 4 1 Disk Access command The sector count register determines the number of sectors to be read or written for Read Write and Verify commands A 0 in the sector count register s...

Page 53: ...rom 0 for Read Write Seek and Verify commands are contained in these registers After completion of the command or sector transfer the current cylinder is shown in this register In LBA mode Bits 8 15 of the target address in logical block address are set in this register After completion of a command the register is updated to reflect the current LBA Bits 0 7 10 7 6 2 SMART commands This register s...

Page 54: ...L 1 DEV HS3 HS2 HS1 HS0 Bit 7 Reserved recommended to set 1 Bit 6 L Select LBA mode L 0 CHS mode L 1 LBA mode Bit 5 Reserved recommended to set 1 Bit 4 DEV Device Select Master Slave mode This bit is used to select the drive DEV 0 indicates the first fixed disk drive Master and DEV 1 indicates the second Slave Single mode should be 0 If this is 1 a drive is not selected but 00h shall be returned t...

Page 55: ...revolving at normal speed and gets ready to receive a command Bit 5 DF Device Fault DF 1 indicates that the drive has detected a fault condition during the execution of a Read Write commands read write and seek commands are negated and Error bit is set DF is set to 1 until the next command whether the device is in fault condition or not Bit 4 DSC 3 Drive Seek Complete DSC 1 indicates that a seek o...

Page 56: ...xed disk operations Commands are executed when the TASK FILE is loaded and the command register is written and only when The status is not busy BSY is inactive and DRDY drive ready is active Any code NOT defined in the following list causes an Aborted Command error Interrupt request INTRQ is reset when a command is written The following are acceptable commands to the command register ...

Page 57: ... O X X O X X Stand by E2 96H O X X O X X Idle E3 97H O X X O X X Check Power Mode E5 98H O X X O X X Sleep E6 99H O X X O X X Read Buffer E4H X X X O X X Flush Cache E7H X X X O X X Write Buffer E8H X X X O X X Identify Device ECH X X X O X X Set Features EFH X X X O X O Security Set Password F1H X X X O X X Unlock F2H X X X O X X Erase Prepare F3H X X X O X X Erase Unit F4H X X X O X X Freeze F5H...

Page 58: ...0 7 13 Device Address register4 CS1 DA2 DA0 7 read only The device address register is a read only register used for diagnostic purposes The followings are definitions of bits for this register RSVD WTG HS3 HS2 HS1 HS0 DS1 DS0 Bit 7 Reserved high impedance Bit 6 WTG Write Gate This bit is active when a Write to the disk is in progress Bit 5 Bit 2 HS3 to HS0 Head Select bits Bit 5 through 2 are one...

Page 59: ...LIZE DEVICE PARAMETERS READ BUFFER READ DMA READ LONG READ MULTIPLE READ NATIVE MAX ADDRESS READ SECTOR S READ VERIFY SECTOR S RECALIBRATE SECURITY DISABLE PASSWORD SECURITY ERASE PREPARE SECURITY ERASE UNIT SECURITY FREEZE LOCK SECURITY SET PASSWORD SECURITY UNLOCK SEEK SET FEATURES SET MAX ADDRESS SET MULTIPLE MODE SLEEP SMART Enable Disable Attribute autosave SMART DISABLE OPERATIONS SMART ENAB...

Page 60: ... no no change CY 00H HD no change SN no change SC no change FT no change LBA 00H This command will set BSY bit and move the R W heads on the disk to cylinder 0 At the completion of a seek it revises the status resets BSY and generates an interrupt 10 8 3 Flush Cache E7h COMMAND CODE 1 1 1 0 0 1 1 1 RESISTER SETTING DR drive no This command reports the completion of a Write cache to the host At the...

Page 61: ... 23h If L bit 1 this command returns the requested data and associated ECC information The data field transfer is 16 bits wide but the ECC information is accepted in only one byte 8 bits at a time Long command is valid only for single sector transfer SC 01 10 8 6 Write Sector 30h 31h COMMAND CODE 0 0 1 1 0 0 L X REGISTER REGISTER SETTING NORMAL COMPLETION DR drive no no change CY starting cylinder...

Page 62: ...ODE 0 0 1 1 1 1 0 0 REGISTER REGISTER SETTING NORMAL COMPLETION DR drive no no change CY starting cylinder last possible HD starting head last possible SN starting sector start sector SC no of sector to be written 00H LBA starting address last address This command is identical to a Write sector command except that verification is not performed A Write verify command transfers the number of sectors...

Page 63: ...ive seeks to the target cylinder if the head is not on the target track implied seek After completion of the command it resets BSY and generates an interrupt Format table consists of the number of sectors 16 bits per track Upper byte represents sector number and lower byte represents format type The drive supports only 00H format type Intending to maintain compatibility with previous models the dr...

Page 64: ... CODE 1 0 0 0 X X X X 1 0 0 1 1 0 1 0 1 1 1 1 0 0 0 0 1 1 1 1 0 1 1 1 1 1 1 1 1 0 1 X 1 1 1 1 1 1 X X These commands are only for factory use Host must not issue them 10 8 13 Execute Diagnostics 90h COMMAND CODE 1 0 0 1 0 0 0 0 REGISTER REGISTER SETTING NORMAL COMPLETION DR OOH CY OOH HD OOH SN O1H SC O1H FT This command enables the drive to execute following self test and reports the results to t...

Page 65: ...ich can be read by Identify Device Command On issuing this command the content of CY register shall not be checked This command will be terminated with ABORT error when it is issued on a invalid HD or SC register setting SC register 0 or the combination of HD and SC register exceeds the drive parameter Any drive access command should accompany correct HD SN register with heads and sectors within t...

Page 66: ...shall be executed prior to the Read Multiple command When the Read Multiple command is issued the Sector Count Register contains the number of required sectors not the number of blocks or the block count If the number of required sectors is not evenly divisible by the block count The redundant sectors are transferred during the final partial block transfer The partial block transfer shall be for N...

Page 67: ...out programming of intervening interrupts by the Set Multiple Mode command which shall be executed prior to the Write Multiple command When the Write Multiple command is issued the host sets the number of sectors not the number of blocks or the block count it requests in the Sector Count Register If the number of required sectors is not evenly divisible by the block count the redundant sectors are...

Page 68: ...e Sector Count Register contains 0 when the command is issued Read Multiple and Write Multiple commands are disabled In case of software reset the result depends on the setting of Set Feature command If FT 66h the mode is not changed If FT CCh the mode reverts to power on default 16 sectors 10 8 18 Read DMA C8h C9h COMMAND CODE 1 1 0 0 1 0 0 X REGISTER REGISTER SETTING NORMAL COMPLETION DR drive n...

Page 69: ...o Sector command except following differences Host initialize slave DMA channel before issuing command Data transfer is initiated by DMARQ and handled by slave DMA channel in the host Drive issue only one interrupt at the completion of each command to show the status is valid after data transfer During DMA transfer phase either BSY or DRQ is set to 1 When a command is completed CY HD SN register L...

Page 70: ...nd from the host when it is in stand by mode the spindle starts rotating and the drive executes read write operation After power on the spindle starts rotating and enters the idle mode During idle or stand by READY bit is set and the drive is ready to receive a command To be specific there are four different sub commands defined by lower 4 bits of command as follows The drive is in the idle mode a...

Page 71: ... below the drive enters stand by mode When SC 0 the drive goes into idle mode and enables auto stand by function The value in SC register is converted to the value of auto stand by timer according to the following table Value in SC register Setting 0 45 min 1 255 SC x 5 sec When the specified time period has expired the drive enters the stand by mode If disk access command is received during the s...

Page 72: ... sets BSY sets up the buffer for read operation sets DRQ resets BSY and generates an interrupt The host reads up to 512 bytes of data from the buffer 10 8 22 Write Buffer E8h COMMAND CODE 1 1 1 0 1 0 0 0 REGISTER REGISTER SETTING NORMAL COMPLETION DR drive no no change CY no change HD no change SN no change SC 00H FT no change This command transfers a sector of data from the host to the specified ...

Page 73: ...e SN no change SC 00H FT no change The identify device command requests the drive to transfer parameter information to the host When the command is issued the drive sets BSY stores the required parameter information in the sector buffer sets the DRQ bit and issues an interrupt The host may read the parameter information of the sector buffer The parameter words in the buffer are arranged as shown i...

Page 74: ...t implemented 01H FFH Maximum number of sectors that can be transferred per interrupt on READ WRITE MULTIPLE commands 8010 48 Reserved 0000 49 Capabilities 15 14 Reserved 13 1 Standby timer values as specified in ATA ATAPI 5 specification are supported 0 Standby timer values are vendor specific 12 Reserved 11 1 IOCHRDY supported 10 1 IOCHRDY can be disabled 9 1 8 1 7 0 Reserved 0F00 50 Capabilitie...

Page 75: ...m PIO Transfer Cycle Time With IOCHRDY Flow Control 0078 69 79 Reserved for future command overlap and queuing 0000 80 Major version number 0000h or FFFFh device does not report version 15 4 Reserved for ATA 6 14 5 1 supports ATA ATAPI 5 4 1 supports ATA ATAPI 4 3 1 supports ATA 3 2 1 supports ATA 2 1 1 supports ATA 1 0 Reserved 003E 81 Minor version number 0000h or FFFFh device does not report ve...

Page 76: ...ed 9 1 DEVICE RESET command supported 8 1 SERVICE interrupt enabled 7 1 release interrupt enabled 6 1 look ahead enabled 5 1 write cache enabled 4 1 supports PACKET Command feature set 3 1 supports power management feature set 2 1 supports removable feature set 1 1 Security feature set enabled 0 1 SMART feature enabled XXXX 86 Command set feature enabled 15 9 Reserved 8 1 SET MAX security extensio...

Page 77: ...evice 0 does not respond when Device 1 is selected 1 Device 0 responds when Device 1 is selected 5 0 Device 0 did not detect the assertion of DASP 1 Device 0 detected the assertion of DASP 4 0 Device 0 did not detect the assertion of PDIAG 1 Device 0 detected the assertion of PDIAG 3 0 Device 0 failed diagnostics 1 Device 0 passed diagnostics 2 1 These bits indicate how Device 0 determined the dev...

Page 78: ...ATURES subcommand to spin up after power up and IDENTIFY DEVICE response is incomplete C837 Device does not requires SET FEATURES subcommand to spin up after power up and IDENTIFY DEVICE response is complete All other valies Reserved Power up in Standby feature set is not supported The value for this WORD is C837h WORD 3 Logical head number that user can access in default mode 2 WORD 4 5 Reserved ...

Page 79: ...RD is 0F00h WORD 50 Capabilities bit 15 0 Fixed bit 14 1 Fixed bit 13 1 Reserved bit 0 1 device has a minimum Standby timer value that is device specific Standby timer value is set to 5 minutes or more The value for this WORD is 4001h WORD 51 PIO data transfer cycle timing mode bit 15 8 PIO data transfer cycle timing mode bit 7 0 Reserved The value returned in Bits 15 8 should fall into one of the...

Page 80: ...for each models are Drive Type 4 Word 57 58 MK6017MAP 11 733 120 B30880H WORD 59 bit15 9 Reserved bit 8 1 bit 7 0 shows number of sectors for multiple sector operation multiple sector operation is enabled by SET MULTIPLE command bit 7 0 The number of sectors transferred for XXH Write Read multiple command with 1 Interrupt Current value shall be set by SET MULTIPLE command The default value is 16 T...

Page 81: ...s supported The value for this WORD is 0003h WORD 65 Minimum multiword DMA transfer mode cycle time per word ns If this bit is supported word 53 bit 1 shall be set The value for this WORD is 0078h 120ns WORD 66 Manufacturer recommended multiword DMA transfer cycle time If the data transfer is requested in a shorter cycle time than this definition the data transfer may be kept pending with DMARQ lo...

Page 82: ...re set supported bit 9 DEVICE RESET command supported bit 8 SERVICE interrupt supported bit 7 Release Interrupt supported bit 6 Look Ahead supported bit 5 Write Cache supported bit 4 PACKET feature set supported bit 3 The Power Management feature set is supported bit 2 The Removable feature set is supported bit 1 The security feature set is supported bit 0 The SMART feature set is supported The va...

Page 83: ...tension enabled by SET MAX SET PASSWORD bit 7 Reserved bit 6 1 SET FEATURES subcommand required to spin up after power up bit 5 1 Power Up In Standby feature set enabled bit 4 Removable Media Status Notification feature set enabled bit 3 Advanced power Management feature set enabled bit 2 CFA feature set supported bit 1 WRITE READ DMA QUEUED command supported bit 0 DOWNLOAD MICROCODE supported The...

Page 84: ...e 1 hardware reset result Device 0 shall clear these bits to zero Device 1 shall set these bits as follows 12 Reserved 11 0 Device 1 did not assert PDIAG 1 Device 1 asserted PDIAG 10 9 These bits indicate how Device 1 determined the device number 00 Reserved 01 a jumper was used 10 the CSEL signal was used 11 some other method was used or the method is unknown 8 1 Fixed bit 7 0 Device 0 hardware r...

Page 85: ... is expired and SECURITY UNLOCK and SECURITY ERASE UNIT are aborted until receiving a power on reset or hard reset bit 3 security frozen 1 the drive is in security frozen mode bit 2 security locked 1 the drive is in security locked mode bit 1 security enabled 1 the security is enabled bit 0 security supported 1 security is supported WORD 129 254 Reserved WORD 255 Integrity word The data structure ...

Page 86: ...s set value affects the values of WORD 1 54 57 58 60 61 of IDENTIFY DEVICE command This command shall be immediately preceded by Read Native Max Address command Otherwise it will be terminated with ABORT ERROR If this command is issued twice with a volatile bit set to 1 after power up or hardware reset ID Not Found error will be reported Volatile bit SC register bit 0 If this command is issued wit...

Page 87: ... 3 bits show mode figure PIO default transfer mode 00000 000 PIO default transfer mode disable IORDY 00000 001 PIO flow control transfer mode nnn 00001 nnn Single word DMA mode nnn 00010 nnn Multiword DMA mode nnn 00100 nnn Ultra DMA mode nnn 01000 nnn Reserved 10000 nnn PIO default mode is mode 4 flow control DMA default mode is Multiword word DMA mode 2 The level of Advanced Power Management fun...

Page 88: ...The settings of the identifier and security level bits interact as shown in the table below Identifier and security level Identifier Level Command result User High The password supplied with the command will be saved as the new user password The lock function will be enabled by the next power on The drive can then be unlocked by either the user password or the previously set master password Master...

Page 89: ...he Identifier bit is set to user the drive compares the supplied password with the stored user password If the drive fails in comparing passwords then the drive returns an abort error to the host and decrements the unlock counter This counter is initially set to five and will be decremented for each mismatched passwords when SECURITY UNLOCK is issued and the drive is locked When this counter is ze...

Page 90: ...t be completed immediately prior to the SECURITY ERASE UNIT command otherwise the SECURITY ERASE UNIT command shall be aborted This command disables the drive lock function however the master password is still stored internally within the drive and may be reactivated later when a new user password is set 10 8 31 SECURITY FREEZE LOCK F5h COMMAND CODE 1 1 1 1 0 1 0 1 REGISTER REGISTER SETTING NORMAL...

Page 91: ...d command error The SECURITY DISABLE PASSWORD command requests a transfer of a single sector of data from the host including the information specified in the following table Then the drive checks the transferred password If the user password or the Master password match the given password the drive disables the lock function This command does not change the Master password which may be reactivated...

Page 92: ...e subcommands and their respective codes are listed below Subcommand Code SMART READ ATTRIBUTE VALUES D0h SMART READ ATTRIBUTE THRESHOLDS D1h SMART ENABLE DISABLE AUTOSAVE D2h SMART SAVE ATTRIBUTE VALUES D3h SMART EXECUTE OFF LINE IMMIDIATE D4h SMART READ LOG SECTOR D5h SMART WRITE LOG SECTOR D6h SMART ENABLE OPERATIONS D8h SMART DISABLE OPERATIONS D9h SMART RETURN STATUS DAh SMART ENABLE DISABLE ...

Page 93: ...structure revision number 2 361 1st 30th Individual attribute data 362 Off line data collection status 363 Self test execution status 364 365 Total time in seconds to complete off line data collection activity 366 Reserved 367 Total time in seconds to complete off line data collection activity 368 369 SMART capability 370 Error logging capability 7 1 Reserved 0 1 Device error logging supported 371...

Page 94: ...or rate attribute bit bit 4 Event Count Attribute bit bit 5 Self Preserving Attribute bit bit 6 15 Reserved 3 Attribute value 01h FDh 00h FEh FFh Not in use 01h Minimum value 64h Initial value Fdh Maximum value 4 Worst Ever normalized Attribute Value valid values from 01h FEh 5 10 Raw Attribute Value Attribute specific raw data FFFFFFh reserved as saturated value 11 Reserved 00h ID Attribute Name ...

Page 95: ...test routine was aborted by the host 2 The self test routine was interrupted by the host with a hard or soft reset 3 A fatal error or unknown test error occurred while the device was executing its self test routineand the device was unable to complete the self test routine 4 The previous self test completed having a test element that failed and the test element that failed is not known 5 The previ...

Page 96: ...NOT saved before Power save mode changes This bit shall be set to 1 bit 1 SMART data autosave after event capability bit This bit is fixed to 1 bit 2 15 Reserved BYTE 370 Reserved BYTE 372 373 Self test routine recommended polling time The self test routine recommended polling time shall be equal to the number of minutes that is the minimum recommended time before which the host should first poll ...

Page 97: ...ues an interrupt to report to the host that data transfer is ready Byte Descriptions 0 1 Data structure revision number 2 361 1st 30th Individual attribute threshold data 362 510 Reserved 511 Data structure checksum BYTE 0 1 Data structure revision number The value for this byte is 0005h BYTE 2 361 Individual attribute threshold data Individual attribute threshold data consists of 12 byte data See...

Page 98: ...mmand may disable this function Disabling this feature does not preclude the drive from saving attribute values to the attribute data sector during other normal save operations A value of F1h written by the host into the drive s Sector Count register before issuing this command will cause this function to be enabled Any other non zero value written by the host into this register before issuing thi...

Page 99: ... during execution of the subcommand routine c If the device is in the process of performing the subcommand routine and is interrupted by any new command from the host except a SLEEP SMART DISABLE OPERATIONS SMART EXECUTE OFF LINE IMMEDIATE or STANDBY IMMEDIATE command the device suspends or aborts the subcommand routine and service the host within two seconds after receipt of the new command After...

Page 100: ...f test in captive mode the device sets BSY to one and executes the self test routine after receipt of the command At the end of the routine the device places the results of this routine in the Self test execution status byte and executes command completion If an error occurs while a device is performing the routine the device may discontinue its testing place the results of this routine in the Sel...

Page 101: ...en by the host VS Log is vendor specific thus read write ability is vendor specific 10 8 33 6 1 Error log sector The following Table defines the 512 bytes that make up the SMART error log sector SMART error log sector Byte Descriptions 0 SMART error log version 1 Error log index 2 91 First error log data structure 92 181 Second error log data structure 182 271 Third error log data structure 272 36...

Page 102: ... etc If fewer than four commands and resets preceded the command or reset for which the error is being reported the unused command data structures shall be zero filled for example if only three commands and resets preceded the command or reset for which the error is being reported the first command data structure shall be zero filled In some devices the hardware implementation may preclude the dev...

Page 103: ...Executing SMART off line or self test x5h xAh Reserved xBh xFh Vendor unique The value of x is vendor specific and may be different for each state Sleep indicates the reset for which the error is being reported was received when the device was in the Sleep mode Standby indicates the command or reset for which the error is being reported was received when the device was in the Standby mode Active I...

Page 104: ...wenty second entry that shall replace the first entry Then the twenty third entry shall replace the second entry and so on If fewer than 21 self tests have been performed by the device the unused descriptor entries shall be filled with zeroes The content of the self test descriptor entry is shown in the following Table Self test log descriptor entry Byte Descriptions n Content of the Sector Number...

Page 105: ...eld is undefined 10 8 33 6 11 Self test index The self test index shall point to the most recent entry Initially when the log is empty the index shall be set to zero It shall be set to one when the first entry is made two for the second entry etc until the 22nd entry when the index shall be reset to one 10 8 33 6 12 Data structure checksum The data structure checksum is the two s complement of the...

Page 106: ...rite Log Sector COMMAND CODE 1 0 1 1 0 0 0 0 REGISTER REGISTER SETTING NORMAL COMPLETION DR DRIVE No no change CY C24Fh no change HD no change SN Log Sector Address no change SC 01h 00h FT D6h no change This command writes an indicated number of 512 byte data sectors to the indicated log ...

Page 107: ...d asserts INTRQ 10 8 33 9 SMART Disable Operations COMMAND CODE 1 0 1 1 0 0 0 0 REGISTER REGISTER SETTING NORMAL COMPLETION DR DRIVE No no change CY C24Fh no change HD no change SN no change SC no change FT D9h no change This command disables all SMART capabilities within the drive including any and all timer functions related exclusively to this function After receipt of this command the drive ma...

Page 108: ... change This subcommand enables and disables the optional feature that causes the device to perform the set of off line data collection activities that automatically collect attribute data in an off line mode and then save this data to the device s non volatile memory This subcommand may either cause the device automatically initiate or resume performance of its off line data collection activities...

Page 109: ...T SECURITY FREEZE LOCK SECURITY DISABLE PASSWORD Parameter word for the Security mode feature set is described in IDENTIFY DEVICE response Word 128 10 9 1 Security mode default setting The drive is shipped with the master password set to 20h value ASCII blanks and the lock function disabled The system manufacturer dealer may set a new master password by using the SECURITY SET PASSWORD command with...

Page 110: ...TY UNLOCK command is successfully completed Power on Locked mode UNLOCK ERASE Media access Non media PREPARE access No Password ERASE Reject match UNIT Command Execute Command Yes Unit erased Unlock mode Lock function disabled Normal operation all commands are available FREEZE LOCK Normal operation Frozen mode commands are available Figure 4 Password set security mode power on flow ...

Page 111: ...Maximum security level is set it is impossible to access data However the drive can be unlocked using the ERASE UNIT command with the master password The drive will erase all user data and unlock the drive User password lost High Level UNLOCK with master password Maximum ERASE PREPARE Normal operation ERASE UNIT with master password Normal operation but data lost Figure 5 User password lost If bot...

Page 112: ... O O O READ BUFFER O O O READ DMA X O O READ LONG X O O READ MULTIPLE X O O READ NATIVE MAX ADDRESS O O O READ SECTORS X O O READ VERIFY X O O RECALIBRATE O O O SECURITY DISABLE PASSWORD X O X SECURITY ERASE PREPARE O O O SECURITY ERASE UNIT O O X SECURITY FREEZE LOCK X O O SECURITY SET PASSWORD X O X SECURITY UNLOCK O O X SEEK O O O SET FEATURES O O O SET MAX ADDRESS X O O SET MULTIPLE MODE O O O...

Page 113: ...The Commands supported by this feature set are SMART READ ATTRIBUTE VALUES SMART READ ATTRIBUTE THRESHOLDS SMART ENABLE DISABLE ATTRIBUTE AUTOSAVE SMART EXECUTE OFF LINE IMMEDIATE SMART ENABLE OPERATIONS SMART DISABLE OPERATIONS SMART RETURN STATUS 10 10 1 Attributes Attributes are the specific performance or calibration parameters that are used in analyzing the status of the drive Attributes are ...

Page 114: ...e stopped near the disk center If a shock is detected by Shock Sensor the drive enters into Performance Idle mode automatically Power consumption for Active Idle mode is 55 65 lower than that of Performance Idle mode Command processing time is approximately 35ms longer than that of Performance Idle mode 10 11 3 Low Power Idle In Low Power Idle mode the heads are unloaded on the ramp and the spindl...

Page 115: ...e as follows Table 10 12 1 Initialization of Task File registers REGISTER POWER ON HARDWARE RESET SOFTWARE RESET Data 00 00 00 Error 01 01 01 Sector Count 01 01 01 Sector Number 01 01 01 Cylinder Low 00 00 00 Cylinder High 00 00 00 Device Head Register 00 00 00 Status Alternate Status 50 or 52 50 or 52 50 or 52 Device address12 7E or FE 7E or FE 7E or FE ECC Length 4 bytes 4 bytes no change 1 Data...

Page 116: ... plug is inserted into position C D or if jumper plug is set to position B D when P28 CSEL signal is high In case of two drive configuration one shall be Master and the other should be Slave ATA ATAPI specifies to use P28 with jumper plug set to position B D It is recommended to follow the ATA ATAPI specification Jumper P28 Drive No Jumper Master Drive C D Jumper Slave Drive B D Jumper LOW Master ...

Page 117: ...e executing the next command During a write cache operation DASP LED signal line is kept on until all the data in the write buffer are written on the media 10 14 2 Notes for write cache 1 Loss of data in write buffer If write cache is enabled hard reset or soft reset does not cause data loss But power off immediate after completion of the command may cause data loss because actual writing of the d...

Page 118: ...s register issues a reset or writes to the Command register Interrupts are not cleared when host reads Alternate Status register A command shall only be interrupted with a hardware or software reset The result of writing to the command register while BSY 1 or DRQ 1 is unpredictable and may result in data corruption Therefore a command should only be interrupted by a reset at times when the host ju...

Page 119: ...drive negates INTRQ in response to the Status register being read 5 The host reads a sector or block of data via the Data register 6 After the sector has been transferred to the host the drive clears the DRQ bit 7 When ECC data is available for transfer to the host the drive sets the DRQ bit and clears the BSY bit 8 In response to the DRQ bit being set the host reads ECC data 8 bit via the Data re...

Page 120: ...sets the BSY bit 4 When the drive has finished processing the sector or block it sets the DRQ bit and clears the BSY bit and asserts INTRQ 5 After detecting INTRQ the host reads the Status register 6 The drive negates INTRQ in response to the Status register being read e For Write Long command the execution will be as follows 1 When the drive is ready to receive a sector of data from the host the ...

Page 121: ...s for this class are CHECK POWER MODE EXECUTE DEVICE DIAGNOSTICS FLUSH CACHE IDLE IDLE IMMEDIATE INITIALIZE DEVICE PARAMETERS NOP READ VERIFY SECTOR S READ NATIVE MAX ADDRESS RECALIBRATE SEEK SET FEATURES SET MAX ADDRESS SET MULTIPLE MODE SLEEP STANDBY STANDBY IMMEDIATE SECURITY ERASE PREPARE SECURITY FREEZE LOCK SMART Enable Disable Attribute Autosave SMART Save Attribute Values SMART Executive O...

Page 122: ...is different in that no intermediate sector interrupts are issued on multi sector transfer but issued only once at the completion of each command DMA data transfer protocol a Host initializes the slave DMA channel b Host writes any required command parameters to the Features Sector Count Sector Number Cylinder High Cylinder Low and Device Head registers c Host writes the command code to the Comman...

Page 123: ...y to initiate the requested Ultra DMA burst by asserting DMACK d A host shall never assert DMACK without first detecting that DMARQ is asserted e For Ultra DMA data in bursts a drive may begin driving DD 15 0 after detecting that DMACK is asserted STOP negated and HDMARDY is asserted f After asserting DMARQ or asserting DDMARDY for an Ultra DMA data out burst the shall not negate either signal unt...

Page 124: ...ta shall be transferred on this transition of STROBE g A sender returns STROBE to the asserted state whenever it detects a termination request from the recipient No data shall be transferred nor CRC calculated on this edge of DSTROBE h Once a recipient requests a termination it does not change DMARDY from the negated state for the remainder of an Ultra DMA burst k A recipient ignores a STROBE edge...

Page 125: ...OR f13 f1 DD0 XOR CRCOUT15 f9 DD8 XOR CRCOUT7 XOR f5 f2 DD1 XOR CRCOUT14 f10 DD9 XOR CRCOUT6 XOR f6 f3 DD2 XOR CRCOUT13 f11 DD10 XOR CRCOUT5 XOR f7 f4 DD3 XOR CRCOUT12 f12 DD11 XOR CRCOUT4 XOR f1 XOR f8 f5 DD4 XOR CRCOUT11 XOR f1 f13 DD12 XOR CRCOUT3 XOR f2 XOR f9 f6 DD5 XOR CRCOUT10 XOR f2 f14 DD13 XOR CRCOUT2 XOR f3 XOR f10 f7 DD6 XOR CRCOUT9 XOR f3 f15 DD14 XOR CRCOUT1 XOR f4 XOR f11 f8 DD7 XOR...

Page 126: ...d register to BSY 1 400 ns maximum From BSY 1 to BSY 0 DRQ 1 INTRQ set When the drive is in idle mode 20 sec maximum From BSY 1 to BSY 0 DRQ 1 INTRQ set When the drive is in standby mode 35 sec maximum Drive Busy during data transfer 5 µs minimum DATA OUT COMMANDS From writing to command register to BSY 1 400 ns maximum From BSY 1 to BSY 0 DRQ 1 400 ns maximum Drive Busy during data transfer 5 µs ...

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