
WSA5000 Functional Overview
Table 2:
Radio RFE Modes and DSP Data Output Formats
Mode
Description
Freq Range
(MHz)
IBW
(MHz)
DSP Data Output Format
None
CIC/Dec Frequency Shift
ZIF
Zero-IF Receiver
50 - max
100
I
14
Q
14
I
14
Q
14
I
14
Q
14
SH
Super-Heterodyne
Receiver
50 - max
I
14
I
14
Q
14
I
14
Q
14
SH Receiver with
narrower BW
50 - max
10
I
14
I
14
Q
14
I
14
Q
14
HDR
High Dynamic Range
Receiver
50 - max
0.1
I
24
-
-
DD
Direct Digitization
Receiver
50
I
14
I
14
I
14
Q
14
External IQ Input
100
I
14
Q
14
I
14
Q
14
I
14
Q
14
High IF Receiver
50 - max
--
–
–
–
0
The RFE Mode availability is product dependent.
1
The WSA5000 supports a 12-bit or 14-bit WB ADC as a manufacturing population variant. The
least significant bits of the 14-bit data representations are zeroed when the WSA is populated with
the 12-bit WB ADC, hence, the subscript of 14 for IQ or I.
2
The 40MHz SH is only available in WSA5000 product version 1.3 (hardware revision 3) and
higher. Revision 2 hardware value varies between 30 or 35MHz, contact ThinkRF's Support for
further details. See
to find out your hardware/product version (or the Administrative web-
console to the box).
3
SHN mode is only available in WSA5000 product version 1.3 (hardware revision 3) and higher
to find out your hardware/product version (or the Administrative web-console to the
box).
4
For SH and SHN modes, when the decimation is used, a frequency shift of 35MHz for non-WBIQ
models and 55MHz for WBIQ models will be applied automatically to bring the WSA5000's center
frequency back to the zero IF. Thus, the data output will be I and Q.
5
IQIN mode is not available in WSA5000 product version 2.2 and higher. See
to find out
your product version (or the Administrative web-console to the box).
6
In DD and IQIN modes, there is no frequency tuning except for performing frequency shift. When
decimation is applied, the decimation will be around the zero frequency.
7
The HIF mode is only available for WSA5000-XXX-HIF product model and is indicated by the
command's response code 002.
WSA5000 complies to VRT protocol for sending digitized IF data packets and their
associated context information depending on the capture mode. It is very important to
follow the VRT's
) for the exact VRT data output
formats as well as packing method.
RF Receiver Front-End
shows a block diagram of the RFE within the WSA5000.
The architecture consists of a super-heterodyne (SH) front-end with a back-end that
utilizes an I/Q mixer similar to that in a direct-conversion (or zero-IF) receiver.
Depending on the frequency of the signals being analyzed, one of the three receiver
signal processing paths is selected. Signals in the frequency range 100kHz to 50MHz
are directly digitized, while all other signals are translated to the frequencies of the first IF
block via one of the other two signal processing paths. The IF block consists of a bank of
17
ThinkRF WSA5000 Wireless Signal Analyzer Programmer's Guide