TITAN-C SERIES USER MANUAL
16
LVCMOS Clock Frequency
Model
Clock Frequency
Titan-C 1024
35.00 MHz
Titan-C 1280
45.00 MHz
Note:
1.
It is recommended to sample DV data at the rising edge of clock.
2.
The high level is valid for Line_Valid, Frame_Valid.
3.
On a certain line, after the Line_Valid turns to be valid (logic ‘1’) and lasts for n clocks, the data
from column 1 to column n are valid.
7-1 Digital Video
7-1-1 LVCMOS 14-bit or 10-bit
Among the digital video interfaces, LVCMOS and BT.1120 digital video shares the
same hardware interface. The default output is LVCMOS. Other digital videos
are off in default and can be turned on through the PC software or sending the
corresponding command.
This thermal camera core can output 14-bits or 10-bits LVCOMS digital video.
LVCMOS videos consist of one clock signal (Clock), one line valid signal (Line_
Valid), a frame valid signal (Frame_Valid), and 14-bits data signals (DV0 ~ DV13).
When the original data (ORG) and non-uniformity correction data (NUC) is
selected the video data is 14-bits which is DV [13:0]. Among them, DV0 is LSB
and DV13 is MSB.
When the DRC data is selected and the data bits is 10-bit which is DV[9:0].
Among them, DV0 is LSB and DV9 is MSB.
When the 10-bits LVCOMS digital video is selected the product supports
brightness/contrast adjustment and polarity selection, but does not support
palette selection, reticle control, electric zoom, and image mirroring.
7.
Digital Video