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8.19 Timing and Switching Characteristics

8.19.1 Power Management
8.19.1.1 Block Diagram – Internal DC-DCs

The  device  incorporates  three  internal  DC-DCs  (switched-mode  power  supplies)  to  provide  efficient  internal
supplies, derived from V

BAT

.

WL18xx Top Level

Main DC2DC

V

BAT

V

IO

FB

SW

PA

DC2DC

FB

SW

Digital DC2DC

FB

SW

1.8 V

2.2 – 2.7 V

V

BAT

VIO_IN

VBAT_IN_MAIN_DC2DC

VBAT_IN_PA_DC2DC

V

BAT

MAIN_DC2DC_OUT

DIG_DC2DC_OUT

VDD_DIG

LDO_IN_DIG

PA_DC2DC_OUT

FB_IN_PA_DC2DC

1 V

Figure 8-1. Internal DC-DCs

8.19.2 Power-Up and Shut-Down States

The correct power-up and shut-down sequences must be followed to avoid damage to the device.

While V

BAT

 or V

IO

 or both are deasserted, no signals should be driven to the device. The only exception is the

slow clock that is a fail-safe I/O.

While  V

BAT

,  V

IO

,  and  slow  clock  are  fed  to  the  device,  but  WL_EN  is  deasserted  (low),  the  device  is  in

SHUTDOWN state. In SHUTDOWN state all functional blocks, internal DC-DCs, clocks, and LDOs are disabled.

To perform the correct power-up sequence, assert (high) WL_EN. The internal DC-DCs, LDOs, and clock start
to ramp and stabilize. Stable slow clock, V

IO

, and V

BAT

 are prerequisites to the assertion of one of the enable

signals.

To perform the correct shut-down sequence, deassert (low) WL_EN while all the supplies to the device (V

BAT

,

V

IO

, and slow clock) are still stable and available. The supplies to the chip (V

BAT

 and V

IO

) can be deasserted only

after both enable signals are deasserted (low).

Figure 8-2

 shows the general power scheme for the module, including the power-down sequence.

>10 µs

1

2

3

>10 µs

4

5

5

> 60 µs

VBAT

VIO

EXT_32K

WLEN

NOTE: 1. Either VBAT or VIO can come up first.

NOTE:

 2. VBAT and VIO supplies and slow clock (SCLK), must be stable prior to EN being asserted and at all times

NOTE:

 when the EN is active.

NOTE:

 3. At least 60 µs is required between two successive device enables. The device is assumed to be in

NOTE:

 shutdown state during that period, meaning all enables to the device are LOW for that minimum duration.

WL1801MOD, WL1805MOD, WL1831MOD, WL1835MOD

SWRS152N – JUNE 2013 – REVISED APRIL 2021

www.ti.com

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Product Folder Links: 

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WL1831MOD

 

WL1835MOD

Summary of Contents for WiLink WL 1MOD Series

Page 1: ... Different provisioning methods for in home devices connectivity to Wi Fi in one step Lowest Wi Fi power consumption in connected idle 800 µA Configurable wake on WLAN filters to only wake up the system Wi Fi and Bluetooth single antenna coexistence 2 Applications Internet of things IoT Multimedia Home electronics Home appliances and white goods Industrial and home automation Smart gateway and met...

Page 2: ... 4 GHz SPDT WRF2 F F Interface Copyright 2017 Texas Instruments Incorporated NOTE Dashed lines indicate optional configurations and are not applied by default Figure 4 1 WL1835MOD Functional Block Diagram WL1801MOD WL1805MOD WL1831MOD WL1835MOD SWRS152N JUNE 2013 REVISED APRIL 2021 www ti com 2 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links WL1801MOD WL...

Page 3: ... 27 9 2 Bluetooth Features 27 9 3 Bluetooth Low Energy Features 28 9 4 Device Certification 28 9 5 Module Markings 30 9 6 Test Grades 30 9 7 End Product Labeling 31 9 8 Manual Information to the End User 31 10 Applications Implementation and Layout 32 10 1 Application Information 32 11 Device and Documentation Support 38 11 1 Device Support 38 11 2 Support Resources 41 11 3 Trademarks 41 11 4 Elec...

Page 4: ... n 6 1 Related Products For information about other devices in this family of products or related products see the following links Wireless connectivity overview Lowest power and longest range across 14 wireless connectivity standards Sub 1 GHz SimpleLink wireless MCUs High performance long range wireless and ultra low power consumption Reference Designs for WL1835MOD Find reference designs levera...

Page 5: ...EN PIN 43 BT_UART_DBG PIN 46 VBAT_IN PIN 36 EXT_32K PIN 34 GND PIN 35 GND PIN 42 WL_UART_DBG PIN 44 GND PIN 45 GND PIN 47 VBAT_IN PIN 48 GND PIN 49 GND PIN 50 BT_HCI_RTS PIN 51 BT_HCI_CTS PIN 52 BT_HCI_TX PIN 53 BT_HCI_RX PIN 54 GND PIN 55 GND PIN 56 BT_AUD_IN PIN 57 BT_AUD_OUT PIN 58 BT_AUD_FSYNC PIN 60 BT_AUD_CLK PIN 59 GND PIN 61 GND PIN 63 GND PIN 62 RESERVED3 PIN 64 GND GND GND GND GND GND GN...

Page 6: ...ture use NC if not used GPIO12 5 I O PU PU 1 8 V v v v v Reserved for future use NC if not used RESERVED1 21 I PD PD 1 8 V x x x x Reserved for future use NC if not used RESERVED2 22 I PD PD 1 8 V x x x x Reserved for future use NC if not used GPIO4 25 I O PD PD 1 8 V v v v v Reserved for future use NC if not used RESERVED3 62 O PD PD 1 8 V x x x x Reserved for future use NC if not used WLAN Funct...

Page 7: ...luetooth Functional Block Int Signals BT_UART_DBG 43 O PU PU 1 8 V x x v v Option Bluetooth logger BT_HCI_RTS_1V8 50 O PU PU 1 8 V x x v v UART RTS to host NC if not used BT_HCI_CTS_1V8 51 I PU PU 1 8 V x x v v UART CTS from host NC if not used BT_HCI_TX_1V8 52 O PU PU 1 8 V x x v v UART TX to host NC if not used BT_HCI_RX_1V8 53 I PU PU 1 8 V x x v v UART RX from host NC if not used BT_AUD_IN 56 ...

Page 8: ...ND 34 GND v v v v GND 35 GND v v v v GND 37 GND v v v v GND 39 GND v v v v GND 44 GND v v v v GND 45 GND v v v v GND 48 GND v v v v GND 49 GND v v v v GND 54 GND v v v v GND 55 GND v v v v GND 59 GND v v v v GND 61 GND v v v v GND 63 GND v v v v GND 64 GND v v v v GND G1 G36 GND v v v v 1 PU pullup PD pulldown Hi Z high impedance 2 v connect x no connect 3 Host must provide PU using a 10 kΩ resist...

Page 9: ...anism manages the transmitter patterns 8 2 ESD Ratings VALUE UNIT V ESD Electrostatic discharge Human body model HBM per ANSI ESDA JEDEC JS 001 1 1000 V Charged device model CDM per JEDEC specification JESD22 C101 2 250 1 JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process 2 JEDEC document JEP157 states that 250 V CDM allows safe manufacturing ...

Page 10: ...ion to case 4 5 13 1 For more information about traditional and new thermal metrics see the Semiconductor and IC Package Thermal Metrics Application Report 2 These values are based on a JEDEC defined 2S2P system with the exception of the Theta JC RθJC value which is based on a JEDEC defined 1S0P system and will change based on environment as well as application For more information see these EIA J...

Page 11: ...76 5 54 Mbps OFDM 74 9 MCS0 MM 4K 90 4 MCS1 MM 4K 87 6 MCS2 MM 4K 85 9 MCS3 MM 4K 82 8 MCS4 MM 4K 79 4 MCS5 MM 4K 75 2 MCS6 MM 4K 73 5 MCS7 MM 4K 72 4 MCS0 MM 4K 40 MHz 86 7 MCS7 MM 4K 40 MHz 67 0 MCS0 MM 4K MRC 92 7 MCS7 MM 4K MRC 75 2 MCS13 MM 4K 73 7 MCS14 MM 4K 72 3 MCS15 MM 4K 71 0 Maximum input level OFDM 20 0 10 0 dBm CCK 10 0 6 0 DSSS 4 0 1 0 Adjacent channel rejection Sensitivity level 3 ...

Page 12: ...power TP degradation of up to 30 is expected starting from 80 C ambient temperature on MIMO operation 2 Regulatory constraints limit TI module output power to the following Channel 14 is used only in Japan to keep the channel spectral shaping requirement the power is limited 14 5 dBm Channels 1 11 at OFDM legacy and HT 20 MHz rates 12 dBm Channels 1 11 at HT 40 MHz rates 10 dBm Channel 7 at HT 40 ...

Page 13: ...dBm 238 2 4 GHz TX 20 M MIMO MCS15 11 2 dBm 420 2 4 GHz TX 40 M SISO MCS7 8 2 dBm 243 8 9 Bluetooth Performance BR EDR Receiver Characteristics In Band Signals over operating free air temperature range unless otherwise noted PARAMETER 1 2 CONDITION MIN TYP MAX UNIT Bluetooth BR EDR operation frequency range 2402 2480 MHz Bluetooth BR EDR channel spacing 1 MHz Bluetooth BR EDR input impedance 50 Ω ...

Page 14: ...MHz 33 0 EDR adjacent 2 MHz EDR2 33 0 EDR3 28 0 BR adjacent 2 MHz 20 0 EDR adjacent 2 MHz EDR2 20 0 EDR3 13 0 BR adjacent Ι 3Ι MHz 42 0 EDR adjacent Ι 3Ι MHz EDR2 42 0 EDR3 36 0 Bluetooth BR EDR RF return loss 10 0 dB 1 All RF and performance numbers are aligned to the module pin 2 Sensitivity degradation up to 3 dB may occur due to fast clock harmonics with dirty TX on WL1801MOD WL1805MOD WL1831M...

Page 15: ...nce numbers are aligned to the module pin 2 Values reflect default maximum power Maximum power can be changed using a VS command 3 VBAT is measured with an on chip ADC that has an accuracy error of up to 5 8 12 Bluetooth Performance Modulation BR over operating free air temperature range unless otherwise noted CHARACTERISTICS 1 CONDITION 2 MIN TYP MAX UNIT BR 20 dB bandwidth 925 995 kHz BR modulat...

Page 16: ...nterfering signal ratio Smaller numbers indicate better C I performance Image 1 MHz Low energy co channel 12 dB Low energy adjacent 1 MHz 0 Low energy adjacent 2 MHz 38 Low energy adjacent 2 MHz 15 Low energy adjacent 3 MHz 40 1 All RF and performance numbers are aligned to the module pin 2 BER of 0 1 corresponds to PER of 30 8 for a minimum of 1500 transmitted packets according to the Bluetooth l...

Page 17: ...s 7 5 mA Full throughput ACL RX RX 2DH5 3 4 18 0 mA Full throughput BR ACL TX TX DH5 4 50 0 mA Full throughput EDR ACL TX TX 2DH5 4 33 0 mA Page scan or inquiry scan scan interval is 1 28 s or 11 25 ms respectively 253 0 µA Page scan and inquiry scan scan interval is 1 28 s and 2 56 s respectively 332 0 µA 1 The role of Bluetooth in all scenarios except A2DP is slave 2 CL1P5 PA is connected to VBA...

Page 18: ...quence assert high WL_EN The internal DC DCs LDOs and clock start to ramp and stabilize Stable slow clock VIO and VBAT are prerequisites to the assertion of one of the enable signals To perform the correct shut down sequence deassert low WL_EN while all the supplies to the device VBAT VIO and slow clock are still stable and available The supplies to the chip VBAT and VIO can be deasserted only aft...

Page 19: ...s the top level power up sequence for the chip VBAT VIO input EXT_32K input WL_EN input Main 1V8 DC2DC TCXO_CLK_REQ output DIG DC2DC SRAM LDO Internal power stable 5 ms Top RESETZ 4 5 ms delay Figure 8 3 Chip Top Level Power Up Sequence www ti com WL1801MOD WL1805MOD WL1831MOD WL1835MOD SWRS152N JUNE 2013 REVISED APRIL 2021 Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 19 ...

Page 20: ... download and internal initialization NLCP trigger at rising edge MCP trigger at low level Figure 8 4 WLAN Power Up Sequence 8 19 5 Bluetooth Bluetooth low energy Power Up Sequence Figure 8 5 shows the Bluetooth Bluetooth low energy power up sequence Completion of Bluetooth firmware initialztion Initialization time Figure 8 5 Bluetooth Bluetooth low energy Power Up Sequence WL1801MOD WL1805MOD WL1...

Page 21: ...VIH VIH VOH Valid VOL VDD VDD VSS VSS Not Valid Not Valid Clock Input Data Output tWL VOH VOL tWH tODLY max tODLY min Figure 8 7 SDIO Default Output Timing Table 8 1 lists the SDIO default timing characteristics Table 8 1 SDIO Default Timing Characteristics 1 MIN MAX UNIT fclock Clock frequency CLK 2 0 0 26 0 MHz DC Low high duty cycle 2 40 0 60 0 tTLH Rise time CLK 2 10 0 ns tTHL Fall time CLK 2 ...

Page 22: ...DIO HS Output Timing Table 8 2 lists the SDIO high rate timing characteristics Table 8 2 SDIO HS Timing Characteristics MIN MAX UNIT fclock Clock frequency CLK 0 0 52 0 MHz DC Low high duty cycle 40 0 60 0 tTLH Rise time CLK 3 0 ns tTHL Fall time CLK 3 0 ns tISU Setup time input valid before CLK 3 0 ns tIH Hold time input valid after CLK 2 0 ns tODLY Delay time CLK to output valid 7 0 10 0 ns Cl C...

Page 23: ...h the baud rate change occurs HCI hardware includes the following features Receiver detection of break idle framing FIFO overflow and parity error conditions Receiver transmitter underflow detection CTS RTS hardware flow control 4 wire H4 Table 8 4 lists the UART default settings Table 8 4 UART Default Setting PARAMETER VALUE Bit rate 115 2 Kbps Data length 8 bits Stop bit 1 Parity None 8 19 7 1 U...

Page 24: ...o TX_DATA off Hardware flow control 1 0 bytes t6 CTS high pulse duration 1 0 Bit t1 RTS low to RX_DATA on 0 0 2 0 µs t2 RTS high to RX_DATA off Interrupt set to 1 4 FIFO 16 0 bytes Figure 8 11 shows the UART data frame STR Start bit D0 Dn Data bits LSB first PAR Parity bit if used STP Stop bit TX STR D0 D1 D2 Dn PAR STP tb Figure 8 11 UART Data Frame WL1801MOD WL1805MOD WL1831MOD WL1835MOD SWRS152...

Page 25: ...tion time 0 15 top FSYNC_OUT propagation time 0 15 Cl Capacitive loading on outputs 40 pF Table 8 7 lists the Bluetooth codec PCM slave timing characteristics Table 8 7 Bluetooth Codec PCM Slave Timing Characteristics PARAMETER MIN MAX UNIT Tclk Cycle time 81 38 12 288 MHz ns Tw High or low pulse duration 35 of Tclk min tis AUD_IN setup time 5 tih AUD_IN hold time 0 tis AUD_FSYNC setup time 5 tih ...

Page 26: ...O20 54 mA RX current SISO20 MCS7 2 4 GHz 65 mA TX current SISO20 MCS7 2 4 GHz 11 2 dBm 238 mA Maximum peak current consumption during calibration 2 850 mA 1 System design power scheme must comply with both peak and average TX bursts 2 Peak current VBAT can hit 850 mA during device calibration At wakeup the WiLink 8 module performs the entire calibration sequence at the center of the 2 4 GHz band A...

Page 27: ... accelerated Advanced Encryption Standard AES New advanced coexistence scheme with Bluetooth and Bluetooth low energy wireless technology 2 4 GHz radio Internal LNA and PA IEEE Std 802 11b 802 11g and 802 11n 4 bit SDIO host interface including high speed HS and V3 modes 9 2 Bluetooth Features The device supports the following Bluetooth features Bluetooth 5 1 secure connection as well as CSA2 Conc...

Page 28: ...nt Users are cautioned that changes or modifications not expressively approved by the party responsible for compliance could void the authority of the user to operate the equipment This device complies with Part 15 of the FCC rules Operation is subject to the following two conditions This device may not cause harmful interference This device must accept any interference received including interfer...

Page 29: ...adienne l exposition cet appareil et son antenne ne doivent pas étre co localisés ou fonctionnant en conjonction avec une autre antenne or transmitter 9 4 3 ETSI CE The WL18MODGB modules conform to the EU Radio Equipment Directive For further detains see the full text of the EU Declaration of Conformity for the WL18MODGBWL18MODGB test grade 01 WL18MODGB test grade 05 WL18MODGB test grade 31 and WL...

Page 30: ...TELEC compliance mark CE CE compliance mark 9 6 Test Grades To minimize delivery time TI may ship the device ordered or an equivalent device currently available that contains at least the functions of the part ordered From all aspects this device will behave exactly the same as the part ordered For example if a customer orders device WL1801MOD the part shipped can be marked with a test grade of 35...

Page 31: ... host system using this module must display a visible label indicating the following text Contains transmitter module with certificate number 201 135370 9 8 Manual Information to the End User The OEM integrator must be aware of not providing information to the end user regarding how to install or remove this RF module in the user s manual of the end product which integrates this module The end use...

Page 32: ..._AUD_OUT 57 BT_AUD_CLK 60 WL_SDIO_D2 12 WL_SDIO_CLK 8 WL_SDIO_D3 13 WL_SDIO_D0 10 WL_SDIO_D1 11 WL_SDIO_CMD 6 BT_HCI_RTS 50 BT_HCI_RX 53 BT_HCI_TX 52 BT_HCI_CTS 51 GND 16 GPIO_4 25 GPIO_2 26 GPIO_1 27 BT_EN_SOC 41 WLAN_IRQ 14 WLAN_EN_SOC 40 BT_UART_DBG 43 WL_UART_DBG 42 GND G13 GND G14 GND G15 GND G16 GND G9 GND G10 GND 48 GND G11 GND G12 VBAT 46 GND 28 GND G1 GND G2 GND G3 GND G4 GND G5 GND G6 GN...

Page 33: ... vias must be close to the pad 2 Signal traces must not be run underneath the module on the layer where the module is mounted 3 Have a complete ground pour in layer 2 for thermal dissipation 4 Have a solid ground plane and ground vias under the module for stable system and thermal dissipation 5 Increase the ground pour in the first layer and have all of the traces from the first layer on the inner...

Page 34: ...of the antenna on the WL1835MODCOM8B board as well as the RF trace routing from the WL1835 module TI reference design The Pulse multilayer antennas are mounted on the board with a specific layout and matching circuit for the radiation test conducted in FCC CE and IC certifications Note For reuse of the regulatory certification a trace of 1 dB attenuation is required on the final application board ...

Page 35: ...ing Run the host interfaces with ground on the adjacent layer to improve the return path TI recommends routing the signals as short as possible to the host 10 1 5 Thermal Board Recommendations The TI module uses µvias for layers 1 through 6 with full copper filling providing heat flow all the way to the module ground pads TI recommends using one big ground pad under the module with vias all the wa...

Page 36: ...er possible to connect all of the layers to the TI module central or main ground pads Figure 10 5 Via Array Patterns WL1801MOD WL1805MOD WL1831MOD WL1835MOD SWRS152N JUNE 2013 REVISED APRIL 2021 www ti com 36 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated Product Folder Links WL1801MOD WL1805MOD WL1831MOD WL1835MOD ...

Page 37: ...ofile for the WiLink 8 Module Table 10 3 lists the temperature values for the profile shown in Figure 10 6 Table 10 3 Temperature Values for Reflow Profile ITEM TEMPERATURE C TIME s Preheat D1 to approximately D2 140 to 200 T1 80 to approximately 120 Soldering D2 220 T2 60 10 Peak temperature D3 250 maximum T3 10 Note TI does not recommend the use of conformal coating or similar material on the Wi...

Page 38: ...nt platform for Arm Cortex A8 processor developers and hobbyists Boot Linux in under 10 seconds and get started on Sitara AM335x Arm Cortex A8 processor development in less than 5 minutes using just a single USB cable WiLink 8 Module 2 4 GHz Wi Fi Bluetooth COM8 EVM WL1835MODCOM8B The WL1835MODCOM8 Kit for Sitara EVMs easily enables customers to add Wi Fi and Bluetooth technology WL183x module onl...

Page 39: ...during module certification allowing customers to avoid repeated certification when creating their specific applications Smart Home and Energy Gateway Reference Design TIEP SMART ENERGY GATEWAY The Smart Home and Energy Gateway reference design provides example implementation for measurement management and communication of energy systems for smart homes and buildings This example design is a bridg...

Page 40: ...he default LINUX EZSDK Binary on a AM437x EVM AM335x EVM or BeagleBone The software is built with Linaro GCC 4 7 and can be added to Linux SDKs that use a similar toolchain on other platforms The Bluetooth stack is fully qualified QDID 69886 and QDID 69887 provides simple command line sample applications to speed development and has MFI capability on request WiLink Wireless Tools for WL18XX Module...

Page 41: ... They do not constitute TI specifications and do not necessarily reflect TI s views see TI s Terms of Use 11 3 Trademarks WiLink and TI E2E are trademarks of Texas Instruments Android is a trademark of Google Inc IEEE Std 802 11 is a trademark of IEEE Sitara is a trademark of TI Wi Fi is a registered trademark of Wi Fi Alliance Bluetooth is a registered trademark of Bluetooth SIG Linux is a regist...

Page 42: ... mm NOM mm MAX mm L body size 13 20 13 30 13 40 c2 0 65 0 75 0 85 W body size 13 30 13 40 13 50 c3 1 15 1 25 1 35 T thickness 1 80 1 90 2 00 d1 0 90 1 00 1 10 a1 0 30 0 40 0 50 d2 0 90 1 00 1 10 a2 0 60 0 70 0 80 e1 1 30 1 40 1 50 a3 0 65 0 75 0 85 e2 1 30 1 40 1 50 b1 0 20 0 30 0 40 e3 1 15 1 25 1 35 b2 0 65 0 75 0 85 e4 1 20 1 30 1 40 b3 1 20 1 30 1 40 e5 1 00 1 10 1 20 c1 0 20 0 30 0 40 e6 1 00...

Page 43: ... 10 2 00 0 10 2 00 0 10 0 35 0 05 13 80 0 10 13 80 0 10 2 50 0 10 2 20 0 7 W1 W2 100 00 1 5 330 00 2 0 Figure 12 3 Reel Specification Table 12 3 Dimensions for Reel Specification ITEM W1 W2 DIMENSION mm 24 4 1 5 0 5 30 4 maximum www ti com WL1801MOD WL1805MOD WL1831MOD WL1835MOD SWRS152N JUNE 2013 REVISED APRIL 2021 Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 43 Product ...

Page 44: ...2 5 shows a typical shipping box If the shipping box has excess space filler such as cushion is added Note The size of the shipping box may vary depending on the number of reel boxes packed 616 1 243 250 354 362 Figure 12 5 Shipping Box The shipping box is made of corrugated fiberboard WL1801MOD WL1805MOD WL1831MOD WL1835MOD SWRS152N JUNE 2013 REVISED APRIL 2021 www ti com 44 Submit Document Feedb...

Page 45: ...s This data is subject to change without notice and revision of this document For browser based versions of this data sheet refer to the left hand navigation www ti com WL1801MOD WL1805MOD WL1831MOD WL1835MOD SWRS152N JUNE 2013 REVISED APRIL 2021 Copyright 2021 Texas Instruments Incorporated Submit Document Feedback 45 Product Folder Links WL1801MOD WL1805MOD WL1831MOD WL1835MOD ...

Page 46: ...unced but is not in production Samples may or may not be available OBSOLETE TI has discontinued the production of the device 2 RoHS Compliance This product has an RoHS exemption for one or more subcomponent s The product is otherwise considered Pb Free RoHS compatible as defined above 3 MSL Peak Temp The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications and...

Page 47: ...0 24 0 Q1 WL1805MODGBMOCR QFM MOC 100 1200 330 0 24 4 13 8 13 8 2 5 20 0 24 0 Q1 WL1805MODGBMOCT QFM MOC 100 250 330 0 24 4 13 8 13 8 2 5 20 0 24 0 Q1 WL1831MODGBMOCR QFM MOC 100 1200 330 0 24 4 13 8 13 8 2 5 20 0 24 0 Q1 WL1831MODGBMOCT QFM MOC 100 250 330 0 24 4 13 8 13 8 2 5 20 0 24 0 Q1 WL1835MODGBMOCR QFM MOC 100 1200 330 0 24 4 13 8 13 8 2 5 20 0 24 0 Q1 WL1835MODGBMOCT QFM MOC 100 250 330 0...

Page 48: ...67 0 367 0 55 0 WL1805MODGBMOCR QFM MOC 100 1200 367 0 367 0 55 0 WL1805MODGBMOCT QFM MOC 100 250 367 0 367 0 55 0 WL1831MODGBMOCR QFM MOC 100 1200 367 0 367 0 55 0 WL1831MODGBMOCT QFM MOC 100 250 367 0 367 0 55 0 WL1835MODGBMOCR QFM MOC 100 1200 367 0 367 0 55 0 WL1835MODGBMOCT QFM MOC 100 250 367 0 367 0 55 0 PACKAGE MATERIALS INFORMATION www ti com 23 May 2021 Pack Materials Page 2 ...

Page 49: ...t be soldered to the printed circuit board for thermal and mechanical performance PACKAGE OUTLINE 4221006 B 10 2016 www ti com QFM 2 0 mm max height QUAD FLAT MODULE MOC0100A A 0 08 C 0 1 C A B 0 05 C B SYMM SYMM 13 5 13 3 13 4 13 2 PIN 1 INDEX AREA C 2 MAX 60X 0 8 0 7 60X 0 45 0 35 4X 0 8 0 7 36X 1 05 0 95 56X 0 7 7 7 TYP 2X 9 8 2X 12 05 1 4 TYP 7 7 TYP 2X 9 8 2X 11 95 1 4 TYP PIN 2 ID 1 1 17 33 ...

Page 50: ...efer to device data sheet If any vias are implemented it is recommended that vias under paste be filled plugged or tented EXAMPLE BOARD LAYOUT 4221006 B 10 2016 www ti com QFM 2 0 mm max height MOC0100A QUAD FLAT MODULE SYMM SYMM LAND PATTERN EXAMPLE SCALE 8X 2X 11 95 2X 12 05 1 05 TYP 1 4 TYP 60X 0 75 60X 0 4 56X 0 7 1 05 TYP 1 4 TYP 36X 1 4X 0 75 1 17 33 49 64 G1 G7 G13 G19 G25 G31 G6 G12 G18 G2...

Page 51: ...AT MODULE SYMM SYMM SOLDER PASTE EXAMPLE BASED ON 0 125 mm THICK STENCIL PADS 1 17 33 49 G1 G36 90 PRINTED COVERAGE BY AREA SCALE 8X 4X 0 713 36X 0 95 SEE DETAIL A DETAIL A SCALE 20X DETAIL B SCALE 20X SEE DETAIL B SOLDER PASTE SOLDER MASK EDGE METAL UNDER SOLDER MASK SOLDER PASTE 2X 11 95 49 64 G1 G7 G13 G19 G25 G31 2X 12 05 1 05 TYP 1 4 TYP 17 60X 0 75 60X 0 4 56X 0 7 33 1 05 TYP 1 4 TYP G6 G12 ...

Page 52: ...s are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you wi...

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