Open-Lamp Voltage Programming
2-3
Design Procedure
Zero volts on V
AD
commands full current while 3 V commands minimum
current. For the initially configured EVM, maximum current is 4.8 mA. R15 is
selected to be 909
Ω
setting V
AD
to 0 V and lamp current to 4.8 mA. With R2
set to 150 K, R10 is calculated to be 50 K. The control-voltage to lamp-current
equation for the EVM is:
I
LAMP
(mA)
+
4.89
*
1.22
V
AD
(4)
2.4
Open-Lamp Voltage Programming
It is necessary to suspend the power-stage operation if an open lamp occurs
because the piezoelectric transformer has a high gain. The open-lamp
detection circuit is composed of voltage divider R7, R8, R9, R11, R14, R16,
R17, R18, R4, R6, D2, and C1. A 1.5 V comparator at the OPEN pin shuts
down the inverter if an open lamp is triggered. The RMS secondary voltage at
which an open lamp shutdown occurs can be calculated by equation (5).
V
OPEN
+
ǒ
1.5 V
)
V
diode
Ǔ
ǒ
S
9
i
+
7
R
i
)
R11
)
R14
)
S
18
j
+
16
R
j
)
R4
)
R6
Ǔ
2
Ǹ
(R4
)
R6)
RMS
(5)
With R7~R9, R11, R14, R16~R18 at 1 Meg each, R6 at 2 k and R4 at 8.2 k,
the RMS value of open lamp threshold voltage at the secondary is 1220 V
RMS
.
The value of capacitor C1 should be large enough to filter the sinusoid
waveform into dc. For this board, 2200 pF was chosen. If C5 is too large, it
takes extra time for OPEN/SD to climb to 1.5 V when the output voltage hits
the open-lamp threshold, resulting in a higher output voltage than the set
value.
The open-lamp level should be set high enough to avoid tripping during normal
operation. Open-lamp detection is disabled for the burst-dimming mode by
connecting pin 3 to pin 2 of JP1. Connect pin 1 to pin 2 of JP1 to enable open
lamp protection.
2.5
Shutdown
The OPEN/SD pin is used for both open-lamp detection and commanded
shutdown. When a voltage higher than 2.5 V is applied to OPEN/SD through
D1, the part enters the shutdown or sleep mode where the oscillator is inactive
and both outputs are high. In this mode, the part draws little current at the V
DD
pin and the OPEN/SD pin.
2.6
No Lock
If the part fails to achieve regulation before reaching minimum frequency
(comp >2.2 V), it causes an internal retry counter to increment and then
attempt another start up. If the application does not operate normally after 7
attempts, the controller enters an error-induced shutdown state removing
power to the load.
Summary of Contents for UCC2977EVM
Page 1: ... July 2002 PMP Systems Power User s Guide SLLU049 ...
Page 6: ...iv ...
Page 11: ...Schematic 1 3 Hardware 1 3 Schematic Figure 1 1 UCC2977EVM Schematic ...
Page 14: ...1 6 ...
Page 26: ...3 8 ...
