SLUUAL8
6.12 EMI Dithering Waveform
Figure 15. EMI Dithering Waveform
The UCC28740 controller employs a unique control mechanism to help with EMI compliance. As
shown in Figure 15, the DRV pin, shown as channel 3, drives the gate of the MOSFET with a
sequence of pulses in which there will be two longer pulses, two medium pulses, and two shorter
pulses at any operating point starting with the amplitude modulation mode. The EMI dithering is not
enabled at light load. Figure 15 shows the result of these varying pulse widths on the CS signal,
shown on channel 4. The longer pulses result in a peak current threshold of 808 mV, the medium
length pulses are shown measured at 780 mV, and the shorter pulses measure a threshold voltage
of 752 mV. This dithering adds to the frequency jitter caused by valley skipping and results in a
spread spectrum for better EMI compliance.
7 EVM
Assembly
Drawing and PCB layout
The following figures (Figure 16 through Figure 19) show the design of the UCC28740EVM-525
printed circuit board. The final dimensions of the single copper layer circuit measure 50.93 mm by
37.36 mm and the height is dominated by the USB connector at 18.4 mm.
Summary of Contents for UCC28740EVM-525
Page 24: ...SLUUAL8 Figure 16 UCC28740EVM 525 Top Layer Assembly Drawing Top view ...
Page 25: ...SLUUAL8 Figure 17 UCC28740EVM 525 Bottom Layer Assembly Drawing Bottom view ...
Page 26: ...SLUUAL8 Figure 18 UCC28740EVM 525 Top Copper Top View ...
Page 27: ...SLUUAL8 Figure 19 UCC28740EVM 525 Bottom Copper Bottom View ...