User’s Guide
Using the UCC21520EVM-286, UCC20520EVM-286,
UCC21521CEVM-286, and UCC21530EVM-286
ABSTRACT
UCC2x5xxEVM-286 evaluation modules are designed for evaluation of TI's 5.7-kV
RMS
isolated dual-channel
gate driver family with 4-A source and 6-A sink peak current for driving Si MOSFETs, IGBTs and
WBG devices such as SiC and GaN transistors. This user's guide covers the UCC21520EVM-286,
UCC20520EVM-286, UCC21521CEVM-286, and UCC21530EVM-286 used to evaluate the UCC21520DW,
UCC20520DW, UCC21521CDW, and UCC21530DWK, respectively. To evaluate other Iso-Drivers in the
UCC2x5xx family, TI recommends that the user read the data sheet thoroughly before switching the part in
the EVMs covered by this user guide. In this user guide, the UCC21520EVM-286 evaluation module is shown
as the primary example, and the key differences between the UCC21520EVM-286 and the UCC20520EVM-286,
UCC21521CEVM-286, and UCC21530EVM-286 will be highlighted accordingly.
Table of Contents
1 Introduction
.............................................................................................................................................................................
2
2 Description
..............................................................................................................................................................................
2
3 Features
...................................................................................................................................................................................
3
3.1 I/O Description...................................................................................................................................................................
3
3.2 Jumpers (Shunt) Setting....................................................................................................................................................
4
4 Electrical Specifications
........................................................................................................................................................
4
5 Test Summary
.........................................................................................................................................................................
5
5.1 Definitions..........................................................................................................................................................................
5
5.2 Equipment..........................................................................................................................................................................
5
5.3 Equipment Setup................................................................................................................................................................
5
6 Power-Up and Power-Down Procedure
................................................................................................................................
8
6.1 Power Up...........................................................................................................................................................................
8
6.2 Power Down.......................................................................................................................................................................
8
7 Test Waveforms (C
L
=0pF) With Different DT Configurations
.............................................................................................
9
7.1 DT Connected to VCCI (J-DT Option B in
Table 3-2
).........................................................................................................
9
7.2 DT Pin Floating or Left Open (J-DT Option A in
Table 3-2
)................................................................................................
9
7.3 DT Pin Connected to RDT (J-DT Option C in
Table 3-2
).................................................................................................
10
8 Schematic
..............................................................................................................................................................................
11
9 Layout Diagrams
...................................................................................................................................................................
12
10 List of Materials
..................................................................................................................................................................
13
11 Revision History
..................................................................................................................................................................
13
List of Figures
Figure 5-1. Jumpers Installation Position.....................................................................................................................................
6
Figure 5-2. Bench Setup Diagram and Configuration..................................................................................................................
7
Figure 6-1. Example Input and Output Waveforms (Channels 3 and 4 are PWM Inputs, Channels 1 and 2 are Outputs).........
8
Figure 7-1. Overlap is Allowed When DT Connected to VCCI (Channels 3 and 4 are PWM Inputs, Channels 1 and 2 are
Driver Outputs).........................................................................................................................................................................
9
Figure 7-2. Test Waveforms if DT is Left Open (Channel 3 and 4 are PWM Inputs, and Channel 1 and 2 are Driver
Outputs)....................................................................................................................................................................................
9
Figure 7-3. Test Waveforms if DT Connected to R
DT
(Channel 3 and 4 is PWM Inputs, and Channel 1 and 2 is Driver
Outputs)..................................................................................................................................................................................
10
Figure 8-1. UCC21520EVM-286 Schematic..............................................................................................................................
11
Figure 9-1. Top Overlay.............................................................................................................................................................
12
Figure 9-2. Top Layer.................................................................................................................................................................
12
www.ti.com
Table of Contents
SLUUBG8C – NOVEMBER 2018 – REVISED OCTOBER 2021
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Using the UCC21520EVM-286, UCC20520EVM-286, UCC21521CEVM-286,
and UCC21530EVM-286
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