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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて

いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの

措置を取っていただく必要がありますのでご注意ください。

1.

電波法施行規則第

6

条第

1

項第

1

号に基づく平成

18

年

3

月

28

日総務省告示第

173

号で定められた電波暗室等の試験設備でご使用

いただく。

2.

実験局の免許を取得後ご使用いただく。

3.

技術基準適合証明を取得後ご使用いただく。

なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。

上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ

ンスツルメンツ株式会社

東京都新宿区西新宿６丁目２４番１号

西新宿三井ビル

3.3.3

Notice for EVMs for Power Line Communication:

Please see

http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page

電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。

http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page

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4

EVM Use Restrictions and Warnings:

4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT

LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.

4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling

or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.

4.3

Safety-Related Warnings and Restrictions:

4.3.1

User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.

4.3.2

EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.

4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,

state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.

5.

Accuracy of Information:

To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate

as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.

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Summary of Contents for TSW4200

Page 1: ...s 1 TSW4200 Demonstration Kit 2 2 DAC3283 EVM Block Diagram 3 3 ADS62P49 EVM Block Diagram 4 4 DAC3283 EVM Software Configuration 6 List of Tables 1 TSW4200 Demonstration Kit Reference Materials 2 2 TSW4200 DAC Default Jumper Setting 4 3 TSW4200 ADC Default Jumper Setting 5 1 SLWU071C April 2010 Revised November 2012 TSW4200 Demonstration Kit Submit Documentation Feedback Copyright 2010 2012 Texas...

Page 2: ... Materials Device Data Sheet EVM User s Guide TSW4200 DAC DAC3283 SLAS693 DAC328xEVM SLAU311 TSW4200 ADC ADS62P49 SLAS635 ADS62PxxEVM SLAU237 The included FMC adapters are the FMC DAC Adapter and the FMC ADC Adapter They are a type of passive interconnect board enabling direct connection of the output of TI s LVDS high speed DACs or ADCs to a standard FMC interconnect header The FMC interconnect h...

Page 3: ...nel outputs that go through a filter network and transformer to J3 Ch A and J1 Ch B c Clock Option The on board CDCDE62005 provides clocks to all the on board devices i The default DAC clock is configured at 614 4 MHz The DAC interpolation FPGA clock TSW3100 CLK and the FIFO OSTR clock can be configured based on the data rate FPGA configuration and system requirement For more information please re...

Page 4: ...power supply input to power supply jack J17 For proper EVM operation and to prevent damage to the EVM only use a 5 V power supply b Analog Input Option The on board ADS62P49 has dual channel transformer coupled inputs from J3 Ch A and J6 Ch B c Clock Option The on board CDCE72010 provides a crystal filtered LVCMOS clock at 245 76 MHz to the on board ADS62P49 The reference clock input of 19 2 MHz t...

Page 5: ...wer option see schematic or ADS62PXX EVM user s guide JP19 1 2 Power option see schematic or ADS62PXX EVM user s guide JP15 1 2 Power option see schematic or ADS62PXX EVM user s guide JP18 1 2 Power option see schematic or ADS62PXX EVM user s guide JP22 1 2 FPGA SDOUT path JP5 1 2 Low ADS62P49 U2 CTRL3 JP6 1 2 Low ADS62P49 U2 CTRL2 JP7 1 2 Low ADS62P49 U2 CTRL1 2 Software See the DAC3283 and the A...

Page 6: ... instructions to the DAC3283 EVM d Toggle the Initialize button This initializes the CDCE62005 clock e Verify that the CDCE62005 LED D4 is illuminated indicating lock 2 For the ADC EVM connect the 5 V supply to J17 The USB connection to ADC EVM is optional The default ADS62P49 operates with internal reference and has 2 s complement LVDS output 3 Connect the ADC and DAC EVMs to the FPGA solution th...

Page 7: ... Xilinx UG472 Multi Region Clocking The use case Driving Multiple BUFRs with Divide and BUFIO in particular provides extensive details over the implementation In an actual end user system implementation ADC and DAC connections to the FPGA should utilize a single FPGA IO bank for a simpler approach For an ADC with serial LVDS output implementation half of an IO bank can handle all connections from ...

Page 8: ...ring the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repair such EVM or provide replacements Repaired EVMs shall be warranted for the remainder of the original warranty period Replaced EVMs shall be warranted for a new full ninety 90 day warranty period 3 ...

Page 9: ... by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Concernant les EVMs avec antennes détachables Conformément à la rég...

Page 10: ... connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation even with the inputs and outputs kept within the specified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors cu...

Page 11: ...F REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE LOSS OF DATA OR BUSINESS INTERRUPTION NO CLAIM SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED 8 2 Specific Limitations IN NO EVENT SHALL T...

Page 12: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

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