Texas Instruments Track bq27520EVM, User Manual, Page: 3 / 22

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Circuit Module Physical Layouts, Bill of Materials, and Schematic
PIN NAME DESCRIPTION
CHG–/LOAD– Low potential of load or charger connection (system VSS)
BAT_GD Access to push-pull output that indicates that pack is ready to be connected to system
BAT_LOW Access to push-pull output that signals low State-of-Charge (SOC)
SOC_INT Access to open-drain output that signals interrupt for changes in SOC
3 Circuit Module Physical Layouts, Bill of Materials, and Schematic
This section contains the board layout, bill of materials, assembly drawings, and schematic for the
bq27520 circuit module.
3.1 Board Layout
This section shows the printed-circuit board (PCB) layers ( Figure 1 through Figure 4 ), assembly drawing,
and schematic for the bq27520 module.
Figure 1. bq27520EVM-001 Layout – Silk Screen
3 SLUU426 – June 2010 bq27520EVM With System-Side, Single-Cell Impedance Track™ Technology
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