Test Point Descriptions
3
SNVU581A – November 2017 – Revised March 2018
Copyright © 2017–2018, Texas Instruments Incorporated
Using the TPSM84824, TPSM84624, and TPSM84424EVM
The Fsw SELECT jumper (P1), the VOUT SELECT jumper (P2) and the RTT SELECT jumper (P3) are
provided for selecting the desired output voltage, the appropriate switching frequency and the appropriate
TurboTrans resistor value. Before applying power to the EVM, ensure that the jumpers are present and
properly positioned for the intended output voltage, switching frequency, and TurboTrans resistor value.
Refer to
for the recommended jumper settings. Always remove input power before changing the
jumper settings.
Table 1. Output Voltage and Switching Frequency Jumper Settings
VOUT Select
Fsw Select
RTT Select
1 V
350 kHz
2 k
Ω
1.2 V
450 kHz
3 k
Ω
1.8 V
600 kHz
6 k
Ω
3.3 V
1000 kHz
11 k
Ω
5 V
1250 kHz
18 k
Ω
7.5 V
1350 kHz
28 k
Ω
3
Test Point Descriptions
Wire-loop test points and two scope probe test points have been provided as convenient connection
points for digital voltmeters (DVM) or oscilloscope probes to aid in the evaluation of the device. A
description of each test point follows:
(1)
Refer to the product datasheet for absolute maximum ratings associated with above features.
Table 2. Test Point Descriptions
(1)
VIN S+
Input voltage monitor. Connect the positive lead of a DVM to this point for measuring efficiency.
VIN S–
Input voltage monitor. Connect the negative lead of a DVM to this point for measuring efficiency.
VOUT S+
Output voltage monitor. Connect the positive lead of a DVM to this point for measuring efficiency, line
regulation, and load regulation.
VOUT S–
Output voltage monitor. Connect the negative lead of a DVM to this point for measuring efficiency, line
regulation, and load regulation.
AGND
Analog ground test point.
PGND
Power ground test point.
VIN Scope (J3)
Input voltage scope monitor. Connect an oscilloscope to this set of points to measure input ripple voltage.
VOUT Scope (J4)
Output voltage scope monitor. Connect an oscilloscope to this set of points to measure output ripple
voltage and transient response.
ENABLE
Enable test point. Connect this test point to AGND to disable the device. Leave this test point open to
enable the device.The UVLO resistor divider (R24 and R25) is connected at this point.
PGOOD
Monitors the power good signal of the device. This is an open drain signal.
PULL_UP
Test point provided for applying a pull-up voltage for the PGOOD signal. A 100-k
Ω
pull-up resistor (R26) is
present on the EVM between this test point and the PGOOD signal.
CLK
Synchronization clock input test point. An AC coupling capacitor (C13) is present on the EVM between this
test point and the SYNC pin of the device. Pads for a termination resistor (R27) are present between this
test point and PGND. An external clock signal can be applied to this point to synchronize the device to an
appropriate frequency.
