Texas Instruments TPSM8286 AA0 Series User Manual Download Page 7

5 Board Layout

This section provides the TPSM8286xAA0xEVM board layout and illustrations in 

Figure 5-1

 through 

Figure 5-6

The Gerbers are available on the 

TPSM82866AA0SEVM tool folder

. All four layers use 2-ounce copper.

Figure 5-1. Top Assembly

Figure 5-2. Top Layer

Figure 5-3. Internal Layer 1

Figure 5-4. Internal Layer 2

Figure 5-5. Bottom Layer

Figure 5-6. Bottom Layer (Mirrored)

6 Schematic and Bill of Materials

This section provides the TPSM8286xAA0xEVM schematic and bill of materials (BOM).

www.ti.com

Board Layout

SLVUCB0A – SEPTEMBER 2021 – REVISED NOVEMBER 2022

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TPSM8286xAA0xEVM Evaluation Module

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Copyright © 2022 Texas Instruments Incorporated

Summary of Contents for TPSM8286 AA0 Series

Page 1: ...ifications 2 2 Setup 4 2 1 Setup 4 2 2 Input Output Connector and Jumper Descriptions 4 3 Safety Instructions 4 4 Test Results 5 5 Board Layout 7 6 Schematic and Bill of Materials 7 6 1 Schematic 8 6...

Page 2: ...o reduce the input voltage ripple C5 C6 C7 and C8 are provided for additional output capacitors These capacitors are not required for proper operation but can be used to reduce the output voltage ripp...

Page 3: ...p Response Measurement Modification www ti com Introduction SLVUCB0A SEPTEMBER 2021 REVISED NOVEMBER 2022 Submit Document Feedback TPSM8286xAA0xEVM Evaluation Module 3 Copyright 2022 Texas Instruments...

Page 4: ...easure the output voltage at this point J5 Pin 5 and 6 GND Output return connection Do not use for currents above 3 A JP1 EN EN pin input jumper Place the supplied jumper across ON and EN to turn on t...

Page 5: ...2866AA0SEVM and Figure 4 2 shows the thermal performance of the TPSM82866AA0HEVM Figure 4 3 shows the loop response measurement of all EVMs Figure 4 1 Thermal Performance TPSM82866AA0SEVM VIN 5 V VOUT...

Page 6: ...0 10 30 20 60 30 90 40 120 50 150 60 180 Gain dB Phase Figure 4 3 Loop Response Measurement VIN 5 V VOUT 1 2 V IOUT 6 A Test Results www ti com 6 TPSM8286xAA0xEVM Evaluation Module SLVUCB0A SEPTEMBER...

Page 7: ...Assembly Figure 5 2 Top Layer Figure 5 3 Internal Layer 1 Figure 5 4 Internal Layer 2 Figure 5 5 Bottom Layer Figure 5 6 Bottom Layer Mirrored 6 Schematic and Bill of Materials This section provides t...

Page 8: ...VOUT 14 VOUT 15 VSET MODE 3 TPSM82866AA0SRDJR U1 S S 5 4 1 2 3 6 J4 5 4 1 2 3 6 J5 22 F C1 47 F C3 22 F C9 10 0 R6 S S 47 F C2 47 F C5 47 F C6 47 F C7 47 F C8 SW TP1 GND GND GND GND PG 100k R1 22pF C4...

Page 9: ...exas Instruments 0 0 1 0 U1 1 3 5 4 mm TPSM82866AA0HRDMR Texas Instruments 0 0 0 1 U1 1 3 5 4 mm TPSM82864AA0HRDMR Texas Instruments 1 These U1 devices may not contain the correct top side markings Th...

Page 10: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 11: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 12: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 13: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 14: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 15: ...change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of thes...

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