www.ti.com
PCB Layout
7
SBVU034 – July 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
TPS7A39EVM-865 Evaluation Module
4
PCB Layout
Figure 1
to
Figure 3
illustrate the PCB layout for this EVM.
Figure 1. Assembly Layer
Figure 2. Top Layer Routing
Figure 3. Bottom Layer Routing