TPS74601DRVR
OUT
1
FB
2
GND
3
EN
4
PG
5
IN
6
PAD
7
U1
J1
IN
J7
GND
J4
IN_S
DNP
J3
TP1
IN_S
J2
OUT
J8
GND
TP2
OUT_S
J5
OUT_S
DNP
2.2uF
C3
2.2uF
C4
DNP
TP4
PG_S
GND
GND
GND
GND
GND
GND
2.2uF
C1
DNP
2.2uF
C2
0.01uF
C5
10.0k
R1
TP3
EN
34.8k
R2
54.9k
R3
15.4k
R4
6.98k
R5
4.32k
R6
5
V
3
.3
V
1
.8
V
0
.9
V
1
2
3
4
5
6
7
8
J9
OUTPUT VOLTAGE
GND
TP7
GND
TP8
GND
TP6
GND
TP5
GND
GND
1
2
3
J6
Vin Up to 6 V
Vout Selected by J9
Iout Up to 1 A
Schematic
8
SBVU046 – March 2018
Copyright © 2018, Texas Instruments Incorporated
TPS746EVM-009 Evaluation Module
5
Schematic
is the schematic for this EVM.
Figure 4. TPS746EVM-009 Schematic