5.5 VCCA Settings
These settings detail the default monitoring enabled on VCCA. All these settings can be changed though I
2
C
after startup.
Table 5-5. VCCA NVM Settings
Register Name
Field Name
TPS65941515-Q1
Value
Description
VCCA_VMON_CTRL
VMON_DEGLITCH_SEL
0x1
20 us
VCCA_VMON_EN
0x1
Enabled; OV and UV comparators.
VCCA_PG_WINDOW
VCCA_OV_THR
0x7
+10%
VCCA_UV_THR
0x7
-10%
VCCA_PG_SET
0x0
3.3 V
5.6 GPIO Settings
These settings detail the default configurations of the GPIO rails. All these settings can be changed though I
2
C
after startup. Note that the contents of the GPIOx_SEL field determine which other fields in the GPIOx_CONF
and GPIO_OUT_x registers are applicable. To understand which NVM fields apply to each GPIOx_SEL option,
see the
Digital Signal Descriptions
section in TPS6594-Q1 data sheet.
Table 5-6. GPIO NVM Settings
Register Name
Field Name
TPS65941515-Q1
Value
Description
GPIO1_CONF
GPIO1_OD
0x0
Push-pull output
GPIO1_DIR
0x0
Input
GPIO1_SEL
0x1
SCL_I2C2/CS_SPI
GPIO1_PU_SEL
0x0
Pull-down resistor selected
GPIO1_PU_PD_EN
0x0
Disabled; Pull-up/pull-down resistor.
GPIO1_DEGLITCH_EN
0x0
No deglitch, only synchronization.
GPIO2_CONF
GPIO2_OD
0x0
Push-pull output
GPIO2_DIR
0x0
Input
GPIO2_SEL
0x2
SDA_I2C2/SDO_SPI
GPIO2_PU_SEL
0x0
Pull-down resistor selected
GPIO2_PU_PD_EN
0x0
Disabled; Pull-up/pull-down resistor.
GPIO2_DEGLITCH_EN
0x0
No deglitch, only synchronization.
GPIO3_CONF
GPIO3_OD
0x0
Push-pull output
GPIO3_DIR
0x0
Input
GPIO3_SEL
0x2
NERR_SOC
GPIO3_PU_SEL
0x0
Pull-down resistor selected
GPIO3_PU_PD_EN
0x1
Enabled; Pull-up/pull-down resistor.
GPIO3_DEGLITCH_EN
0x1
8 us deglitch time.
GPIO4_CONF
GPIO4_OD
0x0
Push-pull output
GPIO4_DIR
0x0
Input
GPIO4_SEL
0x6
LP_WKUP1
GPIO4_PU_SEL
0x0
Pull-down resistor selected
GPIO4_PU_PD_EN
0x1
Enabled; Pull-up/pull-down resistor.
GPIO4_DEGLITCH_EN
0x1
8 us deglitch time.
Static NVM Settings
16
User Guide for Powering Jacinto
TM
7 J7200 DRA821 with Single TPS6594-Q1
PMIC, PDN-2A
Copyright © 2022 Texas Instruments Incorporated