
Introduction
3
SLIU021 – September 2016
Copyright © 2016, Texas Instruments Incorporated
TPS65916 EVM User’s Guide
1.3
Default Jumper Settings
describes the default jumper settings for the TPS65916 EVM. No changes should be made to
these settings without consulting the TPS65916 EVM schematic.
Table 1. Default Jumper Settings for TPS65916EVM
JUMPER
PURPOSE
EVM CONFIGURATION
P12
VIO Selection
Pins 11 and 12 are shorted to select external 1.8V as VIO
P15
VIO Selection
No pins on this header are shorted since there is a shunt on
P12.
J2
POWERGOOD Pull-up resistor
J2 is
closed
to enable the pull-up resistor for the POWERGOOD
signal
J3
Level Shifter Voltage Selection
J3 is
closed
to select VIO as the level shifted voltage for U5,
U6, and U7
J7
I
2
C or SPI CLK
J7 is
closed
to select the I2C_SCL signal
J10
I
2
C or SPI Data
J10 is
closed
to select the I2C_SDA signal
J22
GPIO_1 GUI Control
J22 is
closed
to allow GPIO_1 (RESET_IN) to be controlled
through the GUI
J26
GPIO_5 Selection
GPIO_5 is shorted HIGH to allow the device to power-up
J30
BOOT Selection
BOOT is shorted LOW to exercise the default power-up
sequence
J31
PWRON Selection
PWRON is shorted HIGH
J32
LDO5 Input Selection
J32 is
closed
to supply LDO5 from the same supply as the
other LDOs
J35
I2C_SCL Connection to PMIC
J35 is
closed
to use the onboard SCL signal from the MSP430
J36
I2C_SDA Connection to PMIC
J36 is
closed
to use the onboard SDA signal from the MSP430
J43 – J54
Level Shifter Direction Selection and
Enable
Jumpers J43 through J54 should be left as they are configured
to enable proper level shifter functionality
JP1
LDO Input Selection
JP1 is closed to supply the LDOs from VSYS instead of an
external supply (VDD)
JP2
VCC_SENSE Selection
VCC_SENSE is shorted to VSYS instead of an external supply
(VDD)
JP3
D2 Indicator Selection
Pins 1 and 2 are shorted to allow the status of POWERGOOD
signal to be indicated by D2
JP6
D5 Indicator Selection
Pins 1 and 2 are shorted to allow the status of the
POWER_HOLD signal to be indicated by D5
JP7
D7 Indicator Selection
Pins 1 and 2 are shorted to allow the status of the RESET_IN
signal to be indicated by D7