User's Guide
SWCU093C – August 2011 – Revised May 2013
TPS65910Ax User's Guide For AM335x Processors
This user's guide can be used as a reference for connectivity between the TPS65910Ax power-
management integrated circuit (PMIC) and the AM335x processor.
1
Introduction
This user's guide can be used as a reference for connectivity between the TPS65910Ax PMIC and the
AM335x processor. The TPS65910AA1 device is to support the AM335x processor with DDR2.
TPS65910A3A1 and TPS65910A31A1 devices are to support the AM335x processor with DDR3. This
user's guide does not provide details about the power resources or the functionality of the device. For
such information, refer to the full specification document, TPS65910 Data Manual.
Table 1
compares TPS65910Ax devices
Table 1. TPS65910Ax comparison
TPS65910A
TPS65910A3
TPS65910A31
DDR2
DDR3
DDR3
Memory
(VIO=1.8V)
(VIO=1.5V)
(VIO=1.5V)
Low power mode
Low power mode
VRTC power mode
Full power mode
(VRTC_REG.VRTC_OFFMASK
(VRTC_REG.VRTC_OFFMA
in OFF state
(VRTC_REG.VRTC_OFFMASK=1)
=0)
SK=0)
2
Connection Diagram and TPS65910Ax EEPROM Definition
Figure 1
shows the connection diagram between the processor and the TPS65910A or TPS65910A3.
Figure 2
shows the connection diagram between the processor and TPS65910A31.
Notes for connection diagram:
•
To support the processor power-up sequence, connect BOOT0 to ground and BOOT 1 to VRTC to
select EEPROM boot mode.
•
The TPS65910Ax digital control signal level is defined by the VDDIO connection.
•
VAUX2 can support up to 300 mA for the specific case of a 3.3-V output level.
•
The VDD1 and VDD2 connections shown in
Figure 1
and
Figure 2
is valid for processor version ZCZ
(15 x 15). In ZCE (13 x 13), VDD_MPU and VDD_CORE are shorted internally. For ZCE, connect
VDD1 to VDD_MPU; VDD2 is free for system use.
5
SWCU093C – August 2011 – Revised May 2013
TPS65910Ax User's Guide For AM335x Processors
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