GND
GND
GND
V3V
100k
R7
VIN
GND
GND
10k
R4
GND
GND
40V
3A
D1
1
2
3
Q1
10μH
L1
220uH
L2
15.0
R0
100μF
C4
DNP
0.01μF
C7
0.022μF
C12
1 F
μ
C3
0.1μF
C13
DNP
100k
R2
10k
R3
100k
R9
EXTM
VCTRL
LX
1
VIN
2
VCC
3
AGND
4
TCAP
5
ISET
6
EN
7
FAULT
8
ADDR
9
VCTRL
10
SDA
11
SCL
12
EXTM
13
DOUT
14
DIN
15
VLNB
16
VCP
17
BOOST
18
GDR
19
PGND
20
EP
21
U1
TPS65235-1RUKR
0.01μF
C14
1
2
3
J4
1
2
3
J7
1
2
3
4
5
6
J6
1
2
3
J5
TP6
TP8
1
2
3
4
5
6
7
8
9
10
P1
0.022μF
C5
1 F
μ
C6
110k
R1
1 F
μ
C2
TP3
GND
J2
GND
28V
D0
DNP
VCC
VCC
SCL
SDA
100k
R6
33.0k
R5
VCC
GND
BOOST
VCC
VCTRL
0.1μF
C10
GND
40V
2A
D3
0.1μF
C11
40V
2A
D2
DNP
GND
VOUT
FAULT
VCC
VOUT
VCC
GND
EXTM
SCL
SDA
ADDR
EN
DIN
DOUT
VIN
VCC
ISET
TCAP
TP1
LX
VCP
VLNB
GDR
J1
ADDR
EN
GND
GND
TP5
TP7
22μF
C9
10k
R8
GND
TP2
1
2
3
J3
22μF
C8
TP4
GND
10μF
C1
4.5V to 16V, 6A
11V to 20V, 1A
Copyright © 2016, Texas Instruments Incorporated
Schematic
3
SLVUAZ0 – November 2016
Copyright © 2016, Texas Instruments Incorporated
Evaluation Module for the TPS65235-1 LNB Voltage Regulator With I
2
C
Interface for DiSEqC2.x Application
2
Schematic
illustrates the EVM schematic.
Figure 1. TPS65235-1 EVM Schematic for DiSEqC 2.x Application