Connector and Test Point Descriptions
4.2
Enable Jumpers / Switches
4.2.1
S1: PB_IN
S1 is connected to PB_IN. Pressing the switch S1 pulls the PB_IN pin of the TPS6507x low, starting up all
dc-dc converters and LDOs according to the device internal sequence. Note that if S1 is released, all
dc-dc converters and LDOs shut down if the POWER_ON input is low. If POWER_ON is pulled high
before PB_IN is released high again, the dc-dc converters and LDOs remain on.
JP1: EN_DCDC1
Connect a shorting bar between EN_DCDC1 and ON to pull the EN_DCDC1 pin high (VSYS) and
enable the step-down converter DCDC1. Connect a shorting bar between EN_DCDC1 and OFF to pull
the EN_DCDC1 pin low (GND) and disable DCDC1.
Note that the enable pins of all dc-dc converters and LDOs that are part of the internal automatic
sequence should be terminated to GND. To control the converters with the respective individual
ENABLE pins, the power sequence for the dc-dc converters DCDC_SQ must be set to '101' in User
Register CON_CTRL1 (0Dh).
JP2: EN_DCDC2
Connect a shorting bar between EN_DCDC2 and ON to pull the EN_DCDC2 pin high (VSYS) and
enable the step-down converter DCDC2. Connect a shorting bar between EN_DCDC2 and OFF to pull
the EN_DCDC2 pin low (GND) and disable DCDC2.
Note that the enable pins of all dc-dc converters and LDOs that are part of the internal automatic
sequence should be terminated to GND. To control the converters with the respective individual
ENABLE pins, the power sequence for the dc-dc converters DCDC_SQ must be set to '101' in User
Register CON_CTRL1 (0Dh).
JP3: EN_DCDC3
Connect a shorting bar between EN_DCDC3 and ON to pull the EN_DCDC3 pin high (VSYS) and
enable the step-down converter DCDC3. Connect a shorting bar between EN_DCDC3 and OFF to pull
the EN_DCDC3 pin low (GND) and disable DCDC3.
Note that the enable pins of all dc-dc converters and LDOs that are part of the internal automatic
sequence should be terminated to GND. To control the converters with the respective individual
ENABLE pins, the power sequence for the dc-dc converters DCDC_SQ must be set to '101' in User
Register CON_CTRL1 (0Dh).
JP4: DEFDCDC2
Connecting a shorting bar between DEFDCDC2 and LOW selects the output voltage set in User
Register DEFDCDC2_LOW (11h). Connecting a shorting bar between DEFDCDC2 and HIGH selects
the output voltage set in User Register DEFDCDC2_HIGH (12h).
Refer to
for information on the default output voltages on DCDC2. After start-up, the user can
adjust the LOW/HIGH output voltage of DCDC2 in the corresponding User Registers. Refer to the
device data sheet for detailed information.
JP5: DEFDCDC3
Connecting a shorting bar between DEFDCDC3 and LOW selects the output voltage set in the User
Register DEFDCDC3_LOW (13h). Connecting a shorting bar between DEFDCDC3 and HIGH selects
the output voltage set in the User Register DEFDCDC3_HIGH (14h).
Refer to
for information on the default output voltages on DCDC3. After start-up, the user can
adjust the LOW/HIGH output voltage of DCDC3 in the corresponding User Registers. Refer to the
device data sheet for detailed information.
JP6: POWER_ON
The POWER_ON pin must be pulled high before PB_IN is released high again to keep the dc-dc
converters and LDOs enabled once PB_IN is released high. Pulling POWER_ON low disables all dc-dc
converters and LDOs. Connect a shorting bar between POWER_ON and Hi to pull the POWER_ON
pin high. The pull-up source can be selected with resistors R45 (VDCDC2), R46 (VDCDC1) and R47
(SYS). In the factory default configuration, R45 and R46 are open, while R47 is assembled. This
configuration selects SYS as the pull-up source. Connect a shorting bar between POWER_ON and
GND to pull the POWER_ON pin low. This configuration disables all dc-dc converters and LDOs.
11
SLVU291B
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April 2010
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Revised September 2011
TPS6507xEVM
Copyright
©
2010
–
2011, Texas Instruments Incorporated