Setup
4
SLVUBK9A – July 2019 – Revised October 2019
Copyright © 2019, Texas Instruments Incorporated
TPS6381xEVM
2.1.4
J2, Pin 1 and 2 – VOUT
Positive output voltage connection
2.1.5
J2, Pin 3 and 4 – S+/S-
Output voltage sense connections. Measure the output voltage at this point.
2.1.6
J2, Pin 5 and 6 – GND
Output voltage GND return connection, common with J1 GND connection
2.1.7
TP1, TP2 – L1, L2
Test points connected to L1 and L2 switch node pins of the TPS6381x
2.1.8
TP3, TP4 – GND
Test points connected to SDA and SCL pins of the TPS6381x
2.1.9
J3 – I2C
10-pin header used to connect the USB2ANY adaptor to the EVM
2.1.10
JP1 – VSEL
Placing a jumper across VSEL and VOUT1 pins sets the output voltage to the value in VOUT1 register.
Placing a jumper across VSEL and VOUT2 pins sets the output voltage to the value in VOUT2 register.
2.1.11
JP2 – ENABLE
Placing a jumper across pins EN and ON enables the device. Placing a jumper across pins EN and OFF
disables the device.
2.2
Setup
To operate the EVM, connect a power supply with the positive lead to J1 VIN pins and the negative lead
to J1 GND pins. Connect a load with the positive lead to J2 VOUT pins and the negative lead to J2 GND
pins. Place a jumper across VSEL and VOUT1 or VOUT2 pins on JP1 to select the corresponding output
voltage register. Place a jumper across EN and ON pins on JP2 to enable the device.
3
Board Layout
This section provides the TPS6381xEVM board layout and illustrations.
3.1
Layout
through
show the component placement and PCB layout of the TPS6381xEVM.
