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Introduction

3

SLVUBR1 – August 2019

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Copyright © 2019, Texas Instruments Incorporated

TPS630702EVM User's Guide

1.2

Performance Specification

Table 1

provides a summary of the TPS630702EVM performance specifications. All specifications are

given for an ambient temperature of 25°C.

Table 1. Performance Specification Summary

Specification

Test Conditions

Min

Typ

Max

Unit

Input voltage

2

16

V

Output voltage

2.5

5

9

V

Output current

during operation V

IN

4.5 V

0

2000

mA

during operation V

OUT

4.5 and boost factor

(V

OUT

/V

IN

)

1

0

2000

mA

Operating frequency

2400

kHz

1.3

Modifications

The printed-circuit board (PCB) for this EVM is designed to accommodate both the fixed and adjustable
versions of this IC. If the fixed version is installed, R1 and R3 are replaced with a 0-

resistor and R2 is

open. Extra positions are available for additional input and output capacitors.

1.3.1

Adjustable-Output IC U1 Operation

U1 is configured for evaluation of the adjustable-output version. This unit is set to 5 V. Resistors R1, R2
and R3 can be used to set the output voltage between 2 V and 9 V. See the data sheet for recommended
values.

1.3.2

Fixed-Output Operation

U1 can be replaced with the fixed version for evaluation. With the fixed version, R1 and R3 need to be
replaced with a 0-

resistor; R2 position is open.

2

Setup

This section describes how to properly use the TPS630702EVM.

2.1

Input/Output Connector and Header Descriptions

2.1.1

J1, Pin 1 and 2 – VIN

Positive input connection from the input supply for the EVM.

2.1.2

J1, Pin 3 and 4 – S+/S-

Input voltage sense connections. Measure the input voltage at this point.

2.1.3

J1, Pin 5 and 6 – GND

V

IN

GND return connection from the input supply for the EVM, common with J2, pin 5 and 6.

2.1.4

J2, Pin 1 and 2 – VOUT

Output voltage connection.

2.1.5

J2, Pin 3 and 4 – S+/S-

V

OUT

Sense and GND Sense low-current sense lines for sampling the output voltage at the output

capacitor.

Summary of Contents for TPS630702EVM

Page 1: ...t the output voltage with the VSEL pin The EVM operates from 2 V to 16 V input voltage Output currents can go up to 2 A in buck mode and boost mode This document includes setup instructions for the ha...

Page 2: ...e inductor internally compensated buck boost converter in a 15 pin 2 5 mm 3 mm HotRod package Both fixed and adjustable output voltage units are available 1 1 Background The TPS630702EVM uses the TPS6...

Page 3: ...ditional input and output capacitors 1 3 1 Adjustable Output IC U1 Operation U1 is configured for evaluation of the adjustable output version This unit is set to 5 V Resistors R1 R2 and R3 can be used...

Page 4: ...the center pin VSEL and HIGH sets the output voltage to 5 V Shorting jumper between the center pin VSEL and LOW sets the output voltage to 3 3 V 2 1 10 JP3 PWR Save Shorting jumper between the center...

Page 5: ...2019 Texas Instruments Incorporated TPS630702EVM User s Guide 3 Board Layout This section provides the TPS630702EVM board layout and illustrations 3 1 TPS630702EVM Layout Figure 2 through Figure 4 sh...

Page 6: ...Board Layout www ti com 6 SLVUBR1 August 2019 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated TPS630702EVM User s Guide Figure 3 Top Layer Routing of TPS630702EVM...

Page 7: ...www ti com Board Layout 7 SLVUBR1 August 2019 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated TPS630702EVM User s Guide Figure 4 Bottom Layer Routing of TPS630702EVM...

Page 8: ...Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated TPS630702EVM User s Guide 4 Schematic and Bill of Materials This section provides the TPS630702EVM schematic and bill of mat...

Page 9: ...1uF CAP CERM 0 1 F 25 V 10 X7R 0402 0402 GRM155R71C104KA55 Murata 1 C9 68uF CAP TA 68 F 20 V 10 0 15 ohm SMD 7343 31 T495D686K020ATE150 Kemet 1 L1 1 5uF Inductor Shielded Composite 1 5 H 4 6 A 0 01oh...

Page 10: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 11: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 12: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 13: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 14: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 15: ...e resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reprod...

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