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Bill of Materials

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8

SBVU052 – March 2019

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Copyright © 2019, Texas Instruments Incorporated

TPS7B82EVM-024 Evaluation module

6

Bill of Materials

Table 2

lists the BOM for this EVM.

(1)

These assemblies are ESD sensitive, observe ESD precautions.

(2)

These assemblies must be clean and free from flux and all contaminants. Use of no-clean flux is not acceptable.

(3)

These assemblies must comply with workmanship standards IPC-A-610 Class 2.

(4)

Unless otherwise noted in the

Alternate Part Number

or

Alternate Manufacturer

columns, all parts may be substituted with equivalents.

Table 2. TPS7B82EVM-024 BOM

(1) (2) (3) (4)

Designator

QTY

Value

Description

Package Reference

Part Number

Manufacturer

Alternate Part

Number

Alternate

Manufacture

r

!PCB1

1

Printed Circuit Board

LP024

Any

C2

1

0.1uF

CAP, CERM, 0.1 uF, 50 V, +/- 10%, X7R, 0805

0805

GRM21BR71H104KA01L

MuRata

GRM21BC71E10
6ME11L

MuRata

C4

1

10uF

CAP, CERM, 10 µF, 10 V,+/- 10%, X5R, 0603

0603

GRM188R61A106KE69D

MuRata

D1

1

60V

Diode, Schottky, 60 V, 2 A, SMA

SMA

B260A-13-F

Diodes Inc.

J1, J2

2

Standard Banana Jack, Insulated, Red

6091

6091

Keystone

J3, J6

2

Header, 2.54 mm, 2x1, Gold, R/A, SMT

Header, 2.54 mm, 2x1, R/A,
SMT

878980204

Molex

J7, J8

2

Standard Banana Jack, Insulated, Black

6092

6092

Keystone

R1

1

10.0k

RES, 10.0 k, 1%, 0.1 W, 0603

0603

RCG060310K0FKEA

Vishay Draloric

SH-J1, SH-J2

2

1x2

Shunt, 100mil, Gold plated, Black

Shunt

SNT-100-BK-G

Samtec

969102-0000-DA

3M

TP1, TP2, TP3,
TP4, TP5, TP6,

TP7, TP8, TP9

9

Test Point, Compact, SMT

Testpoint_Keystone_Compact

5016

Keystone

U1

1

Automotive 300-mA high-voltage ultra-low-Iq low-dropout
(LDO) regulator, KVU0005A (TO-252-5)

KVU0005A

TPS7B8233QKVURQ1

Texas
Instruments

C1

0

2.2uF

CAP, CERM, 2.2 uF, 50 V, +/- 10%, X7R, 1206

1206

GRM31CR71H225KA88L

MuRata

C3

0

10uF

CAP, CERM, 10 uF, 6.3 V, +/- 20%, X5R, 0402

0402

GRM155R60J106ME15D

MuRata

C5

0

10uF

CAP, CERM, 10 uF, 25 V, +/- 10%, X5R, 0805

0805

GRM21BR61E106KA73L

MuRata

FID1, FID2, FID3

0

Fiducial mark. There is nothing to buy or mount.

N/A

N/A

N/A

J4, J5

0

Connector, SMA Jack, Vertical, Gold, SMD

SMA

142-0711-201

Cinch
Connectivity

J9

0

Header, 100mil, 3x2, Tin, TH

3x2 Header

PEC03DAAN

Sullins
Connector
Solutions

Summary of Contents for TPS568230EVM

Page 1: ...ng demonstration and evaluation of the TPS7B8233QKVURQ1 low dropout linear regulator LDO Included in this user s guide are setup and operating instructions layout guidelines a printed circuit board PC...

Page 2: ...rs and Jumper Descriptions 4 2 2 Soldering Guidelines 5 2 3 Equipment Connection 5 3 Operation 5 4 PCB Layout 6 5 Schematic 7 6 Bill of Materials 8 List of Figures 1 TPS7B82EVM 024 Evaluation Module 1...

Page 3: ...egin The following warnings and cautions are noted for the safety of anyone using or working close to the TPS7B82EVM 024 Observe all safety precautions Warning Warning Hot surface Contact may cause bu...

Page 4: ...connector 2 1 3 J3 Diode Bypass Diode D1 bypass To bypass diode D1 connect a jumper to short the two terminals of J3 2 1 4 J4 IN_S Input sense 2 1 5 J5 OUT_S Output sense 2 1 6 J6 Short to Enable Out...

Page 5: ...ns 2 3 Equipment Connection Connect the equipment as described in the following steps 1 Set the input power supply up to 40 V max and turn the power supply off 2 Connect the positive voltage lead from...

Page 6: ...Documentation Feedback Copyright 2019 Texas Instruments Incorporated TPS7B82EVM 024 Evaluation module 4 PCB Layout Figure 2 to Figure 4 show the PCB layout for this EVM Figure 2 Assembly Layer Figure...

Page 7: ...ic 7 SBVU052 March 2019 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated TPS7B82EVM 024 Evaluation module 5 Schematic Figure 5 is the schematic for this EVM Figure 5 TPS7B82...

Page 8: ...A106KE69D MuRata D1 1 60V Diode Schottky 60 V 2 A SMA SMA B260A 13 F Diodes Inc J1 J2 2 Standard Banana Jack Insulated Red 6091 6091 Keystone J3 J6 2 Header 2 54 mm 2x1 Gold R A SMT Header 2 54 mm 2x1...

Page 9: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 10: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 11: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 12: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 13: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 14: ...e resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reprod...

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