EN(TOP)
EN
EN(BOT)
IN(FALL)
EN
EN(TOP)
EN(FALL)
R
V
R
=
V
- V
x
+
x
R
I
IN(RISE)
IN(FALL)
EN(TOP)
EN(FALL)
EN(RISE)
V
- V
R
=
I
- I
(TON)
OUT
R
3 k
15 k x V
=
+
(
)
(BOT)
OUT
REF
(TOP)
REF
R
x V
- V
R
V
=
Introduction
4
SLVUAM8A – December 2015 – Revised March 2019
Copyright © 2015–2019, Texas Instruments Incorporated
TPS54A20EVM-770, 10-A, SWIFT™ regulator evaluation module
1.4
Modifications
These evaluation modules are designed to provide access to the features of the TPS54A20. Some
modifications can be made to this module.
1.4.1
Output Voltage Setpoint
The output voltage is set by the resistor divider network of R9 (R
(TOP)
) and R7 (R
(BOT)
). R7 is fixed at 14.3
k
Ω
. To change the output voltage of the EVM, it is necessary to change the value of resistor R9. Changing
the value of R9 can change the output voltage above the 0.508 V reference voltage V
REF
. The value of R9
for a specific output voltage can be calculated using
(1)
1.4.2
On Time
The TON pin requires a resistor to set the nominal on-time and to support the input voltage feed forward
circuit. The resistance value used also influences the internal ramp in the controller. Use
for
selecting the TON resistor.
(2)
The R
TON
resistor selected for this design example is 22.1 k
Ω
. During startup, the converter uses the
nominal on-time programmed through TON. The phase lock loop (PLL) is only activated after startup is
complete. When the PLL is engaged, the on-time is adjusted. If the nominal on-time programmed
through the TON pin is not close to the on-time when the PLL is engaged, the SYNC range of the
device may be reduced. The TON resistor can also be adjusted to tune the controller. Lowering the
R
TON
value will increase the internal ramp height. This will reduce the converter’s sensitivity to noise
and jitter but it will also reduce the transient response capabilities of the converter.
1.4.3
Adjustable UVLO
The undervoltage lockout (UVLO) can be adjusted externally using R2 (R
EN(TOP)
) and R3 (R
EN(BOT)
). The
EVM is set for a start voltage of 9.385 V and a stop voltage of 9.144 V using R2 = 80.6 k
Ω
and R3 = 12.4
k
Ω
. Use
and
to calculate required resistor values for different start and stop
voltages. I
EN(FALL)
= 4 µA, I
EN(RISE)
= 1 µA and V
EN
= 1.23 V
(3)
(4)
2
Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54A20EVM-770 evaluation
module. The section also includes test results typical for the evaluation module and covers efficiency,
output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up.
2.1
Input/Output Connections
The TPS54A20EVM-770 is provided with input/output connectors and test points as shown in
. A
power supply capable of supplying greater than 2 A must be connected to J1 through a pair of 20 AWG
wires or better. The load must be connected to J4 through a pair of 20 AWG wires or better. The
maximum load current capability is 10 A. Wire lengths must be minimized to reduce losses in the wires.
Test-point TP1 provides a place to monitor the V
IN
input voltages with TP2 providing a convenient ground
reference. TP7 is used to monitor the output voltage with TP8 as the ground reference.