Texas Instruments TPS54373EVM-237, User Manual, Page: 24 / 36

Start-Up
2-10
2.9 Start-Up
Start-up voltage waveforms of the TPS54373EVM–237 are shown in
Figure 2–11 through Figure 2–15. Figure 2–11 shows the start-up waveform
with no precharge on the output. When the V
I
reaches the nominal 2.95-V
UVLO threshold, the slow start capacitor C5 begins to charge. When the
voltage on the SS/ENA pin reaches the enable threshold of 1.2 V, the internal
reference begins to ramp up at the slow start rate. As the internal reference
voltage increases relative to the voltage at VSENSE, the duty cycle of the
PWM comparator output increases. The internal FETs are inhibited from
switching until the output of the PWM comparator reaches maximum duty
cycle. When maximum duty cycle is reached, switching starts and the output
rises quickly while the output voltage catches up with the slow start ramp rate.
At this point the voltage on the VSENSE pin matches the internal reference
and the output continues to ramp up to the final set point value of 1.8 V at the
slow start rate.
Figure 2–11. Measured Start-Up Waveform, TPS54373 With No Precharge
VI 500 mV/div
VO CORE 500 mV/div
Time Scale 5 ms/div
Figure 2–12 shows the start-up waveform with the output precharged and a
2-
Ω
load. The precharge is achieved by connecting the 3.3-V input to the
output with 2 diodes in series. The start-up mechanism is the same as
described above except that now the internal reference must ramp up above
the voltage fed back from the precharged output to the VSENSE pin before
switching starts. Once this occurs, the output continues to ramp up to the
output set point of 1.8 V at the slow start rate. Figure 2–13 and Figure 2–14
show the start-up waveform with 3 and 4 diodes in series. Note the different
levels that the output is precharged to with 2, 3 or 4 diodes in circuit.