Texas Instruments TPS54334EVM-722, User Manual, Page: 11 / 21

EN = 2 V/div
PGOOD = 2 V/div
V 2 V/div
OUT
=
V = 5 V/div
IN
EN = 2 V/div
PGOOD = 2 V/div
V 2 V/div
OUT
=
V = 5 V/div
IN
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Test Setup and Results
2.10 Powering Down
Figure 13 and Figure 14 show the start-up waveforms for the TPS54334EVM-722. In Figure 13 , the output
voltage ramps down as soon as the input voltage falls below the UVLO stop threshold as set by the R1
and R2 resistor divider network. In
Figure 14 , the output is inhibited by using a jumper at JP1 to tie EN to
GND. The input voltage for these plots is 12 V and the load is 2.2 Ω .
Figure 13. TPS54334EVM-722 Shutdown Relative to V
IN
Figure 14. TPS54334EVM-722 Shutdown Relative to EN
11 SLVUAH4 – August 2015 TPS54334EVM-722 3-A Regulator Evaluation Module
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