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3 Board Layout

This section provides a description of the TPS54232EVM-415, board layout, and layer illustrations.

3.1 Layout

The board layout for the TPS54232EVM-415 is shown in 

Figure 3-1

 through 

Figure 3-3

. The topside layer of the 

EVM is laid out in a manner typical of a user application. The top and bottom layers are 2-oz. copper.

The top layer contains the main power traces for V

IN

, V

OUT

, and VPHASE. Also on the top layer are connections 

for the remaining pins of the TPS54232 and a large area filled with ground. The bottom layer contains ground 
and a signal route for the BOOT capacitor. The top and bottom and internal ground traces are connected with 
multiple vias placed around the board including ten vias directly under the TPS54232 device to provide a thermal 
path from the top-side ground plane to the bottom-side ground plane.

The input decoupling capacitor (C1, C2 is not used) and bootstrap capacitor (C4) are all located as close to the 
IC as possible. In addition, the voltage set-point resistor divider components are also kept close to the IC. The 
voltage divider network ties to the output voltage at the point of regulation, the copper V

OUT

 trace past the output 

capacitor (C3, C8 is not used). For the TPS54232, an additional input bulk capacitor may be required, depending 
on the EVM connection to the input supply.

Figure 3-1. TPS54232EVM-415 Top-Side Layout

Board Layout

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10

TPS54232 Step-Down Converter Evaluation Module User's Guide

SLVU277A – JANUARY 2009 – REVISED OCTOBER 2021

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Summary of Contents for TPS54232EVM-415

Page 1: ...n 6 Figure 2 5 TPS54232EVM 415 Transient Response 6 Figure 2 6 TPS54232EVM 415 Loop Response 7 Figure 2 7 TPS54232EVM 415 Output Ripple 7 Figure 2 8 TPS54232EVM 415 Input Ripple 8 Figure 2 9 TPS54232E...

Page 2: ...absolute maximum input voltage is 30 V for the TPS54232EVM 415 Table 1 1 Input Voltage and Output Current Summary EVM INPUT VOLTAGE RANGE OUTPUT CURRENT RANGE TPS54232EVM 415 VIN 5 V to 15 V 0 A to 2...

Page 3: ...ection describes how to properly connect set up and use the TPS54232EVM 415 evaluation module The section also includes test results typical for the evaluation module and covers efficiency output volt...

Page 4: ...y of this EVM peaks at a load current of about 0 5 A with VIN 5 V and then decreases as the load current increases towards full load Figure 2 1 shows the efficiency for the TPS54232EVM 415 at an ambie...

Page 5: ...Load Regulation The load regulation for the TPS54232EVM 415 is shown in Figure 2 3 0 1 0 08 0 06 0 04 0 02 0 0 02 0 04 0 06 0 08 0 1 0 0 2 0 4 0 6 0 8 1 1 2 1 4 1 6 1 8 2 I Output Current A O Output...

Page 6: ...M 415 response to load transients is shown in Figure 2 5 The current step is from 25 to 75 of maximum rated load at 15V input Total peak to peak voltage variation is as shown including ripple and nois...

Page 7: ...M Figure 2 6 TPS54232EVM 415 Loop Response 2 7 Output Voltage Ripple The TPS54232EVM 415 output voltage ripple is shown in Figure 2 7 The output current is the rated full load of 2 A and VIN 15 V The...

Page 8: ...ow start voltage In Figure 2 10 the input voltage is initially applied and the output is inhibited by using a jumper at J2 to tie EN to GND When the jumper is removed EN is released When the EN voltag...

Page 9: ...r than 100 mA typical the device enters Eco mode Figure 2 11 shows Eco mode operation channel 1 C1 shows the output voltage while channel 2 C2 shows the switching node PH Figure 2 11 TPS54232EVM 415 E...

Page 10: ...the board including ten vias directly under the TPS54232 device to provide a thermal path from the top side ground plane to the bottom side ground plane The input decoupling capacitor C1 C2 is not use...

Page 11: ...printed circuit board area for the components used in this design is 0 44 in2 This area does not include test point or connectors www ti com Board Layout SLVU277A JANUARY 2009 REVISED OCTOBER 2021 Su...

Page 12: ...ematic Figure 4 1 is the schematic for the TPS54232EVM 415 Figure 4 1 TPS54232EVM 415 Schematic Schematic and Bill of Materials www ti com 12 TPS54232 Step Down Converter Evaluation Module User s Guid...

Page 13: ...ft 1 R1 150 k Resistor Chip 1 16W 1 0603 Std Std 1 R2 48 7 k Resistor Chip 1 16W 1 0603 Std Std 1 R3 17 4 k Resistor Chip 1 16W 1 0603 Std Std 1 R4 0 Resistor Chip 1 16W 1 0603 Std Std 1 R5 10 2 k Res...

Page 14: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 15: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 16: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 17: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 18: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 19: ...change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of thes...

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