Texas Instruments TPS3801, Application Report

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Circuit Description
4 SLVA075
Table 3. Typical Values of Internal Voltage Divider
DEVICES R1 TYPICAL R2 TYPICAL
TPS3801I50, TPS3809I50 165 k
Ω
495 k
Ω
TPS3801K33, TPS3809K33 256 k
Ω
404 k
Ω
TPS3801L30, TPS3809L30 284 k
Ω
376 k
Ω
TPS3801J25, TPS3809J25 334 k
Ω
326 k
Ω
The TPS3801 has in addition to the TPS3809 a manual reset input. This input has
an internal pullup resistor of 30 k
Ω
to V
DD
. Therefore an external resistor is not
necessary if the function is not used.
The oscillator clocks the reset logic to generate the delay time of about 200ms.
_
+
RESET
Logic
+
Timer
Oscillator
30 k
Ω
R1
R2
Reference
Voltage
or 1.137 V
TPS3809
TPS3801
MR
VDD
GND
RESET
TPS3801
Only!
Figure 4. Block Diagram of TPS3801 and TPS3809
2.6 Basic Timings
Figure 5 summarizes the two reasons for an active reset at a TPS3801. The
behavior of the TPS3809 is the same without the manual reset input.
If the supply voltage is below 1.1 V, there is no defined reset signal. If the supply
voltage increases above 1.1 V, the reset output has a stable low signal. The reset
gets inactive one delay time after the supply voltage has increased the threshold
voltage.
A logical zero at the manual reset input triggers the same as a breaking-in of the
supply voltage: the reset becomes active. One delay time after the manual reset
input gets a logical high signal again, the reset output becomes inactive.