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TP1
FLTb1
1
2
T2
VOUT1
1
2
T1
VIN_SYS1
1
2
J2
Green
1
2
D5
24.3k
R4
VIN1=4.5V to 60V
IIN1=0.6A-6A
34.0k
R5
1
2
J1
GND
TP5
GND
TP3
VIN_SYS1
TP4
VOUT1
TP2
SHDNb1
1uF
100V
C2
TP7
GND
VOUT1=4.5V-60V
IOUT1=0.6A-6A
VIN_SYS1
51V
D3
DNP
C4
29.4k
R3
1uF
100V
C1
D4
GND
30k
R10
9.09k
R8
4.02k
R7
3.0k
R6
1
2
3
4
5
6
7
8
9
1
0
J4
18k
R9
2
1
S1
33V
D2
1000uF
C3
TPS26630RGER
IN
1
IN
2
B_GATE
3
DRV
4
IN_SYS
5
UVLO
6
OVP
7
GND
8
DVDT
9
ILIM
10
MODE
11
SHDN
12
IMON
13
FLT
14
PGTH
15
PGOOD
16
OUT
17
OUT
18
NC
19
NC
20
NC
21
NC
22
NC
23
PAD
25
NC
24
U1
4
7,8
1,2,3
5,6,
Q1
1
2
3
Q2
887k
R2
1
2
J5
30k
R11
56k
R13
TP8
IMON1
49.9k
R1
TP10
FLTb2
1
2
T3
VIN_SYS2
1
2
J8
Green
1
2
D10
24.3k
R19
VIN2=4.5V to 60V
IIN2=0.6A-6A
61.9k
R18
1
2
J7
GND
TP14
GND
TP12
VIN_SYS2
TP13
VOUT2
TP11
SHDNb2
1uF
100V
C6
TP16
GND
VIN_SYS2
51V
D8
DNP
C8
1uF
100V
C5
D9
GND
30k
R24
9.09k
R22
4.02k
R21
3.0k
R20
1
2
3
4
5
6
7
8
9
1
0
J10
18k
R23
2
1
S2
33V
D7
1000uF
C7
4
7,8
1,2,3
5,6,
Q3
1
2
3
Q4
887k
R17
1
2
J11
30k
R25
56k
R27
1
2
T4
VOUT2
TP17
IMON2
49.9k
R16
TP6
GND
TP15
GND
100k
R30
Red
1
2
D1
Red
1
2
D6
VOUT2=4.5V-60V
IOUT2=0.6A-6A
VIN1
VIN2
VIN2
VIN1
1uF
100V
C9
DNP
GND
GND
1uF
100V
C10
DNP
TP9
VIN1
TP18
VIN2
TP19
PGOOD1
TP20
PGOOD2
0
R15
DNP
0
R14
DNP
0
R28
DNP
0
R29
DNP
1
2
J3
1
2
J6
1
2
J9
1
2
J12
TPS26633RGER
IN
1
IN
2
B_GATE
3
DRV
4
IN_SYS
5
UVLO
6
PLIM
7
GND
8
DVDT
9
ILIM
10
MODE
11
SHDN
12
IMON
13
FLT
14
PGTH
15
PGOOD
16
OUT
17
OUT
18
NC
19
NC
20
NC
21
NC
22
NC
23
PAD
25
NC
24
U2
499k
R12
499k
R26
VIN1
VIN2
*VIN2 = 4.5V to 33V with TVS D7 (33V)
*VIN1 = 4.5V to 33V with TVS D2 (33V)
Schematics
16
SLVUBI8A – October 2018 – Revised March 2019
Copyright © 2018–2019, Texas Instruments Incorporated
TPS26630-33EVM: Evaluation Module for TPS2663x
5
Schematics
illustrates the TPS26630-33EVM schematic.
Figure 11. TPS26630-33EVM Schematic