Texas Instruments TPS25830Q1EVM-040 User Manual Download Page 4

General Configuration and Description

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4

SLVUBE2A – April 2018 – Revised May 2019

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TPS25830-Q1 Evaluation Module

3

General Configuration and Description

This section describes the connectors, jumpers, LED and test points on the EVM and how to properly
connect, set up and use the TPS25830Q1EVM-040.

3.1

Physical Access

Table 1

lists the TPS25830Q1EVM-040 connector functionality,

Table 2

describes the jumper

configuration,

Table 3

shows LED labels and description and

Table 4

describes the test point availability.

Table 1. Connectors

Connector

Component Type

Description

J1

Terminal block

Power input connector for TPS25830-Q1. Connect to a 6-V to 36-V power supply.

J3

USB Type-A

connector, plug

Upstream facing USB 2.0 Type A connector. Connect to the USB 2.0 host for data pass
through to J4 or J8. The power pin of this connector is float.

J2

USB Type-C

connector, receptacle

Downstream facing USB Type-C connector. Connect to the USB Type-C slave for data
pass through from J4 and BC1.2 or USB Type-C identification. USB output power is
provided to the slave from the buck converter of the TPS25830-Q1 device.

Table 2. Jumpers

Jumper

Label

Description

J4

CC1

3 × 1 header. Install shunt to connect Ra or Rd on CC1. Remove shunt to float CC1.

J5

CC2

3 × 1 header. Install shunt to connect Ra or Rd on CC2. Remove shunt to float CC2.

J6

CTRL1

Install shunt to select CTRL1 as LOW. Remove shunt to select CTRL1 as HIGH.

CTRL2

Install shunt to select CTRL2 as LOW. Remove shunt to select CTRL2 as HIGH.

Table 3. LED

LED

Label

Description

D4

LD_DET

LD_DET signal LED. Turn on when LD_DET asserts.

D5

POL

POL signal LED. Turn on when POL asserts.

D6

FAULT

FAULT signal LED. Turn on when FAULT asserts.

Table 4. Test Points

Test Point

Label

Description

TP1

VCONN

VCC pin test point via R1 or external Vconn input

TP2

CSN/OUT

CSN pin test point and DC-DC output test point

TP3

CSP

Test point of voltage between inductor and sense resistor.

TP4

VIN

VIN pin test point

TP5

EN

EN pin test point or external EN input.

TP6

RT

RT pin test point or external clock input.

TP7

VBUS

USB Type-A and USB Type-C connector, VBUS test point

TP8, TP9,

TP10, TP11

GND

Power ground test point

TP12

CC1

CC1 pin test point

TP13

CC2

CC2 pin test point

TP14

LD_DET

LD_DET pin test point

TP15

POL

POL pin test point

TP16

FAULT

FAULT pin test point

Summary of Contents for TPS25830Q1EVM-040

Page 1: ...awing Contents 1 Introduction 2 2 Schematic 3 3 General Configuration and Description 4 4 Board Layout 6 5 Bill of Materials 10 List of Figures 1 TPS25830Q1EVM 040 Schematic 3 2 EVM Setup for Charging...

Page 2: ...e compensation current limit and switching frequency can be adjusted by resistors on the EVM 1 1 Features The following features are available on this EVM 6 V to 36 V input range 3 5 A continuous outp...

Page 3: ...0 R8 DNP 0 R12 DNP 15 0k R23 15 0k R26 0 R2 DNP 1 0k R21 10uH L1 9 5 1 2 3 6 7 8 NC 4 Q1 CSD85312Q3E GND A1 SSTXP1 A2 SSTXN1 A3 VBUS A4 CC1 A5 DP1 A6 DN1 A7 SBU1 A8 VBUS A9 SSRXN2 A10 SSRXP2 A11 GND A...

Page 4: ...ntification USB output power is provided to the slave from the buck converter of the TPS25830 Q1 device Table 2 Jumpers Jumper Label Description J4 CC1 3 1 header Install shunt to connect Ra or Rd on...

Page 5: ...25830EVMQ1 040 allows users to synchronize the internal oscillator to both Lo Z clock source and Hi Z clock source by configuring R11 R13 and C13 Refer to the datasheet for detailed information 3 3 Ad...

Page 6: ...2019 Texas Instruments Incorporated TPS25830 Q1 Evaluation Module 4 Board Layout Figure 3 and Figure 4 show the top and bottom assembly Figure 5 and Figure 6 show the top side and bottom side 3D view...

Page 7: ...rd Layout 7 SLVUBE2A April 2018 Revised May 2019 Submit Documentation Feedback Copyright 2018 2019 Texas Instruments Incorporated TPS25830 Q1 Evaluation Module Figure 5 Top Side 3D View Figure 6 Botto...

Page 8: ...w ti com 8 SLVUBE2A April 2018 Revised May 2019 Submit Documentation Feedback Copyright 2018 2019 Texas Instruments Incorporated TPS25830 Q1 Evaluation Module Figure 7 Top Layer Layout Figure 8 Middle...

Page 9: ...Layout 9 SLVUBE2A April 2018 Revised May 2019 Submit Documentation Feedback Copyright 2018 2019 Texas Instruments Incorporated TPS25830 Q1 Evaluation Module Figure 9 Middle Layer 2 Layout Figure 10 Bo...

Page 10: ...18 65x4 5x12mm 931 Keystone J4 J5 2 Header 2 54 mm 3x1 Gold TH Header 2 54 mm 3x1 TH 61300311121 Wurth Elektronik J6 1 Header 2 54 mm 2x2 Gold TH Header 2 54 mm 2x2 TH PBC02DAAN Sullins Connector Sol...

Page 11: ...ct 5016 Keystone U1 1 USB Type C and BC1 2 5V 3 5A Output 36V Input Synchronous Buck with Cable Compensation RHB0032R VQFN 32 RHB0032R TPS25830S10QWRHB Texas Instruments C1 0 0 1 uF CAP CERM 0 1 F 50...

Page 12: ...2 SLVUBE2A April 2018 Revised May 2019 Submit Documentation Feedback Copyright 2018 2019 Texas Instruments Incorporated Revision History Revision History Changes from Original April 2018 to A Revision...

Page 13: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 14: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 15: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 16: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 17: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 18: ...e resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reprod...

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