EVM Assembly Drawing and Layout Guidelines
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14
SLVUAG7A – May 2015 – Revised July 2017
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Copyright © 2015–2017, Texas Instruments Incorporated
TPS2378EVM-602 Evaluation Module
7.3
EMI Containment
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Use compact loops for dv/dt and di/dt circuit paths (power loops and gate drives)
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Use minimal, yet thermally adequate, copper areas for heat sinking of components tied to switching
nodes (minimize exposed radiating surface).
•
Use copper ground planes (possible stitching) and top-layer copper floods (surround circuitry with
ground floods)
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Use a 4-layer PCB, if economically feasible (for better grounding)
•
Minimize the amount of copper area associated with input traces (to minimize radiated pickup)
•
Hide copper associated with switching nodes under shielded magnetics, where possible
•
Heat sink the quiet side of components instead of the switching side, where possible (like the output
side of inductor)
•
Use Bob Smith terminations, Bob Smith EFT capacitor, and Bob Smith plane
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Use Bob Smith plane as ground shield on input side of PCB (creating a phantom or literal earth
ground)
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Use LC filter at DC/DC input
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Dampen high-frequency ringing on all switching nodes, if present (allow for possible snubbers)
•
Control rise times with gate-drive resistors and possibly snubbers
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Switching frequency considerations
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Use of EMI bridge capacitor across isolation boundary (isolated topologies)
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Observe the polarity dot on inductors (embed noisy end)
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Use of ferrite beads on input (allow for possible use of beads or 0-
Ω
resistors)
•
Maintain physical separation between input-related circuitry and power circuitry (use ferrite beads as
boundary line)
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Balance efficiency versus acceptable noise margin
•
Possible use of common-mode inductors
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Possible use of integrated RJ-45 jacks (shielded with internal transformer and Bob Smith terminations)
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End-product enclosure considerations (shielding)
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