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Board Setup

3

SLVUAU3 – January 2017

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TPD2S701-Q1 Evaluation Module

If the switch is placed in position 1, the overvoltage set point is determined instead by external resistors
and an internal voltage reference. In this mode, the device can operate with no external voltage applied to
the 'Vref' pin. The EVM is designed with external resistors to always have a 3.6 V overvoltage set point in
mode 1.

Each device also contains a yellow test point that allows the user to measure the corresponding devices
FLT output. Measure the voltage on this pin to record when the device goes into an undervoltage,
overvoltage, or thermal shutdown state to ensure that the device operates as expected.

2.2

Passthrough Evaluation

Devices U1 and U2 are in a configured to allow for USB 2.0 pass-through testing. The two devices are in
a DSK and DGS package respectively, but otherwise are functionality identical. Each has a male and
female USB port that can be plugged into any system with a USB 2.0 port to ensure that the device can
protect existing systems. Plug J9 or J13 into a USB port and then plug a peripheral into J10 or J14 to
ensure that during typical operation the TPD2S701-Q1 has no effect on standard USB operations. While
plugged in, use a probe to apply a voltage above the overvoltage setpoint to one of the data lines and
observe that the TPD2S701-Q1 isolates the system, preventing any data pass-through. After the voltage is
removed, the TPD2S701-Q1 must remove the isolation and quickly re-allow data communications. See

Figure 2

.

By taking advantage of this pass-through evaluation, the user can quickly determine whether the
TPD2S701-Q1 is optimal for their existing system without requiring any board changes or non-optimal test
setups. There is an additional USB 2.0 pass-through setup at the bottom of the board that is designed for
calibration. The board and trace add some parasitics and bandwidth loss that do not reflect how the
TPD2S701-Q1 operates when designed into a system. This additional pass-through allows for calibration
to account for those and get a more accurate picture of the TPD2S701-Q1.

Figure 2. Passthrough Evaluation Configuration

Summary of Contents for TPD2S701-Q1

Page 1: ...ations to allow the user to test the operation of the TPD2S701 Q1 overvoltage protection and ESD protection in their own system This user s guide includes setup instructions schematic diagrams a bill...

Page 2: ...n additional voltage to the pin labeled Vref but if testing is done in Mode 1 then the Vref pin can be left unused The functional devices modes are discussed in greater depth later but for detailed in...

Page 3: ...n be plugged into any system with a USB 2 0 port to ensure that the device can protect existing systems Plug J9 or J13 into a USB port and then plug a peripheral into J10 or J14 to ensure that during...

Page 4: ...1 operates when designed into a system This additional pass through allows for calibration to account for those and get a more accurate picture of the bandwidth of the TPD2S701 Q1 Figure 3 Bandwidth E...

Page 5: ...www ti com Board Setup 5 SLVUAU3 January 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated TPD2S701 Q1 Evaluation Module Figure 4 ESD Evaluation Configuration...

Page 6: ...6 SLVUAU3 January 2017 Submit Documentation Feedback Copyright 2017 Texas Instruments Incorporated TPD2S701 Q1 Evaluation Module 3 Schematics Figure 5 Schematic Page 1 Figure 6 Schematic Page 2 Figur...

Page 7: ...PD2S701 Q1 Evaluation Module 4 Layout The TPD2S701 Q1 EVM is a 4 layer board of FR4 with measurements of 7 92 inches by 1 9 inches with a thickness of 62 mil Only the top and bottom layers are shown b...

Page 8: ...4 575 4 Keystone J2 J5 J6 J7 J8 5 Header 100 mil 3 1 Tin TH Header 3 PIN 100 mil Tin PEC03SAAN Sullins Connector Solutions J3 J4 2 Connector SMB Vertical RCP 0 4 GHz 50 TH 236 293 236mil 131 3701 261...

Page 9: ...SMT SWITCH 5 4 2 5 3 9 mm CAS 220TA Copal Electronics SH J2 SH J5 SH J6 SH J7 SH J8 5 Shunt 2 54 mm Gold Black Shunt 2 54 mm Black 60900213421 Wurth Elektronik T1 T2 T3 T4 4 SMT Common Mode Choke mcf...

Page 10: ...10 SLVUAU3 January 2017 Submit Documentation Feedback TPD2S701 Q1 Evaluation Module IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES...

Page 11: ...s that include the TI product s identified in such TI Resource NO OTHER LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT AND NO LICENSE TO ANY TECHNOLOGY...

Page 12: ...set forth above or credit User s account for such EVM TI s liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that...

Page 13: ...the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greate...

Page 14: ...pt within the specified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transi...

Page 15: ...OST OF REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF...

Page 16: ...TI Resource NO OTHER LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD...

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