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User's Guide

SLVUAC6 – December 2014

TPD2E2U06-Q1EVM

This user's guide describes the characteristics, operation, and use of the TPD2E2U06-Q1EVM evaluation
module (EVM). This EVM includes 7 TPD2E2U06-Q1’s in various configurations for testing. Five
TPD2E2U06-Q1’s are configured for IEC61000-4-2 compliance testing, one TPD2E2U06-Q1 is configured
for 4-port s-parameter analysis, and one is configured for throughput with USB 2.0 Type A connectors.
Additionally, one of the TPD2E2U06-Q1’s for ESD testing also allows the capture of a clamping waveform
during an ESD event. This user's guide includes setup instructions, schematic diagrams, a bill of
materials, and printed-circuit board layout drawings for the evaluation module.

1

Introduction

Texas Instrument’s TPD2E2U06-Q1 evaluation module helps designers evaluate the operation and
performance of the TPD2E2U06-Q1 device. The TPD2E2U06-Q1 is a dual channel ESD protection device
in a small DBZ package which offers IEC61000-4-2 Level 4 compliant ESD protection. The 1.5 pF line
capacitance is suitable for a wide range of applications. The TPD2E2U06-Q1 is characterized for
operation over an ambient air temperature range of -40°C to 125°C.

The EVM contains seven TPD2E2U06-Q1’s. A single TPD2E2U06-Q1 (U1) is configured with two USB2.0
Type A female connectors (J5 & J6) for capturing Eye Diagrams. The data lines are connected to
TPD2E2U06-Q1’s IO protection pins. A single TPD2E2U06-Q1 (U2) is configured with 4 SMA (J1 – J4)
connectors to allow 4-port analysis with a vector network analyzer. Five TPD2E2U06-Q1’s (U3 – U7) are
configured with test points for striking ESD to the protection pins, one of those (U6) also has an SMB (J7)
connector for capturing clamping waveforms with an oscilloscope during an ESD strike. Caution must be
taken when capturing clamping waveforms during an ESD event so as not to damage the oscilloscope. A
proper procedure is outlined below in

Section 3.4

.

Table 1. EVM Configuration

Reference Designator

TI Part Number

Configuration

U1

TPD2E2U06-Q1

USB 2.0 Eye Diagram

U2

TPD2E2U06-Q1

S-parameters

U3 – U7

TPD2E2U06-Q1

IEC61000-4-2 ESD Tests

U6

TPD2E2U06-Q1

ESD Clamping waveforms

2

DEFINITIONS

Contact Discharge —

a method of testing in which the electrode of the ESD simulator is held in contact

with the device-under-test (DUT).

Air Discharge —

a method of testing in which the charged electrode of the ESD simulator approaches

the DUT, and a spark to the DUT actuates the discharge.

ESD simulator —

a device that outputs IEC61000-4-2 compliance ESD waveforms shown in

Figure 1

with adjustable ranges shown in

Table 2

and

Table 3

.

IEC61000-4-2 has 4 classes of protection levels. Classes 1 – 4 are shown in

Table 2

. Stress tests

should be incrementally tested to level 4 as shown in

Table 3

until the point of failure. If the DUT

does not fail at 8 kV, testing can continue in 2 kV increments until failure.

1

SLVUAC6 – December 2014

TPD2E2U06-Q1EVM

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Copyright © 2014, Texas Instruments Incorporated

Summary of Contents for TPD2E2U06-Q1EVM

Page 1: ...O protection pins A single TPD2E2U06 Q1 U2 is configured with 4 SMA J1 J4 connectors to allow 4 port analysis with a vector network analyzer Five TPD2E2U06 Q1 s U3 U7 are configured with test points f...

Page 2: ...section describes the intended use of the EVM A generalized outline of the procedure given in IEC 61000 4 2 is described here IEC 61000 4 2 should be referred to for a more specific testing outline Ba...

Page 3: ...edure ensures proper testing setup and method for both discharge tests Each IO has a Test Pad TP1 TP10 directly connected to it 3 3 1 Test Method and Set Up An example test setup is shown in Figure 2...

Page 4: ...e Procedure In order to protect the oscilloscope attenuation of the measured signal is required Here are two possible procedures for testing U6 1 Using two 10X attenuators Install a 0 resistor in R1 A...

Page 5: ...E2U06 Q1EVM board layout TPD2E2U06 Q1EVM is a 4 layer board of FR 4 at 0 062 thickness Layers 2 3 and 4 are identical Figure 3 TPD2E2U06 Q1EVM Top Layer 5 SLVUAC6 December 2014 TPD2E2U06 Q1EVM Submit...

Page 6: ...ard Layout www ti com Figure 4 TPD2E2U06 Q1EVM Midlayer 1 Midlayer 2 and Bottom Layers 6 TPD2E2U06 Q1EVM SLVUAC6 December 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporat...

Page 7: ...and Bill Of Materials 5 Schematics and Bill Of Materials 5 1 Schematics Figure 5 TPD2E2U06 Q1EVM Schematic 7 SLVUAC6 December 2014 TPD2E2U06 Q1EVM Submit Documentation Feedback Copyright 2014 Texas In...

Page 8: ...inch 142 0701 231 Emerson Detent SMP P PCB 2 J5 6 Connector USB TYPE A Female 0 52 X 0 55 inch 87583 2010BLF FCI 2 J7 Conn SMB Jack Str 50 Ohm Pcb 0 236 X 0 236 inch 131 3701 261 Molex 1 Standard Bana...

Page 9: ...ing the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repa...

Page 10: ...essful communication This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna imped...

Page 11: ...ified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors current sens...

Page 12: ...REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE L...

Page 13: ...sponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related inf...

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