Texas Instruments TPD2E1B06DRLEVM User Manual Download Page 1

User's Guide

SLVU917 – August 2013

TPD2E1B06DRLEVM

This user's guide describes the characteristics, operation, and use of the TPD2E1B06DRLEVM evaluation
module (EVM). This EVM includes 7 TPD2E1B06DRL’s in various configurations for testing. Five
TPD2E1B06DRL’s are configured for IEC61000-4-2 compliance testing, one TPD2E1B06DRL is
configured for 4-port s-parameter analysis, and one is configured for throughput on USB 2.0 Type A
connectors for throughput analysis. Additionally, two of the TPD2E1B06DRL’s for ESD testing also allow
the capture of clamping waveforms during an ESD event. This user's guide includes setup instructions,
schematic diagrams, a bill of materials, and printed-circuit board layout drawings for the evaluation
module.

1

INTRODUCTION

Texas Instrument’s TPD2E1B06DRL evaluation module helps designers evaluate the operation and
performance of the TPD2E1B06DRL device. The TPD2E1B06DRL is a dual channel ESD protection
device in a small DRL package which offers IEC61000-4-2 Level 4 compliant ESD protection. The 1 pF
line capacitance is suitable for a wide range of applications. The TPD2E1B06DRL is characterized for
operation over an ambient air temperature range of -40°C to 125°C.

The EVM contains seven TPD2E1B06DRL’s. A single TPD2E1B06DRL (U1) is configured with two
USB2.0 Type A female connectors (J5 & J6) for capturing Eye Diagrams. The data lines are connected to
TPD2E1B06DRL’s IO protection pins. A single TPD2E1B06DRL (U2) is configured with 4 SMA (J1 – J4)
connectors to allow 4-port analysis with a vector network analyzer. Five TPD2E1B06DRL’s (U3 – U7) are
configured with test points for striking ESD to the protection pins, two of those (U5 & U6) also have SMB
(J7 & J8) connectors for capturing clamping waveforms with an oscilloscope during ESD test. Caution
must be taken when capturing clamping waveforms during an ESD event so as not to damage the
oscilloscope. A proper procedure is outlined below in

Section 3.4

.

Table 1. EVM Configuration

Reference Designator

TI Part Number

Configuration

U1

TPD2E1B06DRL

USB 2.0 Eye Diagram

U2

TPD2E1B06DRL

S-parameters

U3 – U7

TPD2E1B06DRL

IEC61000-4-2 ESD Tests

U5 & U6

TPD2E1B06DRL

ESD Clamping waveforms

2

DEFINITIONS

Contact Discharge —

a method of testing in which the electrode of the ESD simulator is held in contact

with the device-under-test (DUT).

Air Discharge —

a method of testing in which the charged electrode of the ESD simulator approaches

the DUT, and a spark to the DUT actuates the discharge.

ESD simulator —

a device that outputs IEC61000-4-2 compliance ESD waveforms shown in

Figure 1

with adjustable ranges shown in

Table 2

and

Table 3

.

IEC61000-4-2 has 4 classes of protection levels. Classes 1 – 4 are shown in

Table 2

. Stress tests

should be incrementally tested to level 4 as shown in

Table 3

until the point of failure. If the DUT

does not fail at 8kV, testing can continue in 2 kV increments until failure.

1

SLVU917 – August 2013

TPD2E1B06DRLEVM

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Summary of Contents for TPD2E1B06DRLEVM

Page 1: ...6DRL s IO protection pins A single TPD2E1B06DRL U2 is configured with 4 SMA J1 J4 connectors to allow 4 port analysis with a vector network analyzer Five TPD2E1B06DRL s U3 U7 are configured with test...

Page 2: ...ction describes the intended use of the EVM A generalized outline of the procedure given in IEC 61000 4 2 is described here IEC 61000 4 2 should be referred to for a more specific testing outline Basi...

Page 3: ...cedure ensures proper testing setup and method for both discharge tests Each IO has a Test Pad TP1 TP10 directly connected to it 3 3 1 Test Method and Set Up An example test setup is shown in Figure 2...

Page 4: ...ation of the measured signal is required Here are two possible procedures for testing U5 1 Using two 10X attenuators Attach two 10X attenuators to the oscilloscope channel being used Attach the 50 shi...

Page 5: ...VM board layout TPD2E1B06DRLEVM is a 4 layer board of FR 4 at 0 062 thickness Layers 2 and 3 are ground planes and not shown here Figure 3 TPD2E1B06DRLEVM Top Layer 5 SLVU917 August 2013 TPD2E1B06DRLE...

Page 6: ...BOARD LAYOUT www ti com Figure 4 TPD2E1B06DRLEVM Bottom Layer 6 TPD2E1B06DRLEVM SLVU917 August 2013 Submit Documentation Feedback Copyright 2013 Texas Instruments Incorporated...

Page 7: ...2E1B06DPL TI solution 4 J1 4 Connector SMA 0 25 X 0 375 inch 142 0701 231 Emerson Plug SMA Limited Detent SMP P PCB 2 J5 6 Connector 0 52 X 0 55 inch 87583 2010BLF FCI USB TYPE A Female 2 J7 8 Conn SM...

Page 8: ...ncy energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES 003 rules which are designed to provide reasonable protection against radio fr...

Page 9: ...na type and its gain should be so chosen that the equivalent isotropically radiated power e i r p is not more than that necessary for successful communication This radio transmitter has been approved...

Page 10: ...roduct only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this product or 3 Use of this product only after you obtained the Technical Regulatio...

Page 11: ...erations per the user guidelines Exceeding the specified EVM ratings including but not limited to input and output voltage current power and environmental ranges may cause property damage personal inj...

Page 12: ...sponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related inf...

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