Texas Instruments TPA3156D2EVM, User Manual, Page: 3 / 17

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Operation
3 SLOU499 – October 2017
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Copyright © 2017, Texas Instruments Incorporated
TPA3156D2EVM User’s Guide
2 Operation
This chapter describes the power supply and system interfaces of the TPA3156D2EVM board. Information
regarding handling and unpacking, absolute operating conditions, and a description of the factory default
switch and jumper configurations are also provided. The following is a step-by-step guide to configuring
the TPA3156D2EVM for device evaluation.
2.1 Electrostatic Discharge Warning
Many components on the TPA3156D2EVM are susceptible to damage by electrostatic discharge.
CAUTION
Failure to observe ESD handling procedures may result in damage to EVM
components.
2.2 Unpacking the EVM
When opening the TPA3156D2EVM package, ensure there is one TPA3156D2EVM board using one
TPA3156D2. If the EVM is missing, contact the TI Product Information Center nearest you to inquire about
a replacement.
2.3 Power Supply Setup
A single power supply or separate PVCC/AVCC is required to power up the EVM (see Table 2 ). Because
most of the pins are PVCC compliant, the PVCC supply can also be used to power the analog supply
(AVCC) and to pull up the logic pins for shutdown (SD) control, and fault detection (FAULT).
Table 2. Power Requirements
Description Voltage Range Current Requirement Minimum Wire Size
PVCC/AVCC 4.5 to 26 V 8 A 24 AWG
CAUTION
Applying voltages above the limitations given in Table 2 may permanently
damage the hardware.
2.4 Evaluation Module Preparations
• Ensure that the external power source is set to OFF.
• Connect the external regulated power supply, adjusted from 4.5 V to 26 V, to the module PVCC and
GND banana jacks, taking care to observe marked polarity.