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USING LOW-ESR CAPACITORS
SHORT-CIRCUIT PROTECTION
THERMAL PROTECTION
PRINTED-CIRCUIT BOARD (PCB) LAYOUT
RIGHT_OUT
LEFT_OUT
VCC
Shutdown Control
Mute Control
Left Input
Right Input
470uF
470uF
0.68uF
0.68uF
0.22uF
0.22uF
4.7K
4.7K
22uH
22uH
10uF
10uF
0.1uF
0.1uF
470uF
470uF
1.0uF
1.0uF
1.0uF
1.0uF
0.22uF
0.22uF
TPA3122_PDIP
TPA3122_PDIP
PVCCL
1
SD
2
MUTE
3
LIN
4
RIN
5
BYPASS
6
AGND1
7
AGND2
8
VCLAMP
9
PVCCR
10
PGNDR
11
ROUT
12
BSR
13
GAIN1
14
GAIN0
15
AVCC2
16
AVCC1
17
BSL
18
LOUT
19
PGNDL
20
1.0uF
1.0uF
470uF
470uF
470uF
470uF
1.0uF
1.0uF
0.68uF
0.68uF
0.1uF
0.1uF
0.1uF
0.1uF
4.7K
4.7K
22uH
22uH
TPA3122D2
SLOS527A – DECEMBER 2007 – REVISED DECEMBER 2007
Low-ESR capacitors are recommended throughout this application section. A real (as opposed to ideal) capacitor
can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor
minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance,
the more the real capacitor behaves like an ideal capacitor.
The TPA3122D2 has short-circuit protection circuitry on the outputs that prevents damage to the device during
output-to-output shorts and output-to-GND shorts. When a short circuit is detected on the outputs, the part
immediately disables the output drive. This is an unlatched fault. Normal operation is restored when the fault is
removed.
Thermal protection on the TPA3122D2 prevents damage to the device when the internal die temperature
exceeds 150
°
C. There is a ±15
°
C tolerance on this trip point from device to device. Once the die temperature
exceeds the thermal set point, the device enters into the shutdown state and the outputs are disabled. This is not
a latched fault. The thermal fault is cleared once the temperature of the die is reduced by 30
°
C. The device
begins normal operation at this point with no external system interaction.
Because the TPA3122D2 is a class-D amplifier that switches at a high frequency, the layout of the printed-circuit
board (PCB) should be optimized according to the following guidelines for the best possible performance.
•
Decoupling capacitors—The high-frequency 0.1µF decoupling capacitors should be placed as close to the
PVCC (pins 1 and 10) and AVCC (pins 16 and 17) terminals as possible. The VBYP (pin 6) capacitor and
VCLAMP (pin 9) capacitor should also be placed as close to the device as possible. Large (220 µF or
greater) bulk power supply decoupling capacitors should be placed near the TPA3122D2 on the PVCCL and
PVCCR terminals.
•
Grounding—The AVCC (pins 16 and 17) decoupling capacitor and VBYP (pin 6) capacitor should each be
grounded to analog ground (AGND, pins 7 and 8). The PVCCx decoupling capacitors and VCLAMP
capacitors should each be grounded to power ground (PGND, pins 11 and 20). Analog ground and power
ground should be connected at the thermal pad, which should be used as a central ground connection or star
ground for the TPA3122D2.
•
Output filter—The EMI filter (L1, L2, C9, and C16) should be placed as close to the output terminals as
possible for the best EMI performance. The capacitors should be grounded to power ground.
For an example layout, see the TPA3122D2 Evaluation Module (TPA3122D2EVM) User Manual, (
SLOU214
).
Both the EVM user manual and the thermal pad application note are available on the TI Web site at
http://www.ti.com
.
Figure 28. SE 4-
Ω
Application Schematic
14
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Copyright © 2007, Texas Instruments Incorporated
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