
Interrupts and DMA Events Generated by a McBSP
2-19
McBSP Operation
SPRU592E
2.7 Interrupts and DMA Events Generated by a McBSP
The McBSP sends notification of important events to the CPU and the DMA
controller via the internal signals shown in Table 2
Table 2
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2. Interrupts and DMA Events Generated by a McBSP
Internal Signal
Description
RINT
Receive interrupt
The McBSP can send a receive interrupt request to CPU based
upon a selected condition in the receiver of the McBSP (a
condition selected by the RINTM bits of SPCR1).
XINT
Transmit interrupt
The McBSP can send a transmit interrupt request to CPU based
upon a selected condition in the transmitter of the McBSP (a
condition selected by the XINTM bits of SPCR2).
REVT
Receive synchronization event
An REVT signal is sent to the DMA controller when data has
been received in the data receive registers (DRRs).
XEVT
Transmit synchronization event
An XEVT signal is sent to the DMA controller when the data
transmit registers (DXRs) are ready to accept the next serial
word for transmission.
Summary of Contents for TMS320VC5509
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Page 105: ...SPI Operation Using the Clock Stop Mode 6 16 SPRU592E This page is intentionally left blank ...
Page 187: ...Transmitter Configuration 8 40 SPRU592E This page is intentionally left blank ...
Page 191: ...General Purpose I O on the McBSP Pins 9 4 SPRU592E This page is intentionally left blank ...
Page 201: ...Emulation Power and Reset Considerations 10 10 SPRU592E ...
Page 207: ...Data Packing Examples 11 6 SPRU592E This page is intentionally left blank ...
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