Texas Instruments TMS320TCI648 Series, User Manual, Page: 30 / 48

Registers
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6.15 VCP2 Emulation Control Register (VCPEMU)
The VCP2 emulation control register (VCPEMU) is shown in Figure 18 and described in Table 21 .
Figure 18. VCP2 Emulation Control Register (VCPEMU)
31 1 0
Reserved FREE
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 21. VCP2 Emulation Control Register (VCPEMU) Field Descriptions
Bit Field Value Description
31-1 Reserved 0 Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
0 FREE Free bit
0 Reserved
1 Free run mode - vcp_emususp signal and functions normally.
30 TMS320TCI648x/9x Viterbi-Decoder Coprocessor 2 SPRUE09E – May 2006 – Revised December 2009
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