Texas Instruments TMS320TCI648 Series, User Manual, Page: 18 / 48

Registers
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6.4 VCP2 Input Configuration Register 2 (VCPIC2)
The VCP2 input configuration register 2 (VCPIC2) is shown in Figure 7 and described in Table 10 .
Figure 7. VCP2 Input Configuration Register 2 (VCPIC2)
31 16 15 0
R FL
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 10. VCP2 Input Configuration Register 2 (VCPIC2) Field Descriptions
Bit Field Value Description
31-16 R 0-FFFFh Reliability length bits (see Section 8.1 ).
15-0 FL 0-FFFFh Frame length bits (see Section 8.1 ). The total number of non-encoded bits (i.e., the number of
information bits that are input to the encoder at the transmitter or output from the decoder at
the receiver).
18 TMS320TCI648x/9x Viterbi-Decoder Coprocessor 2 SPRUE09E – May 2006 – Revised December 2009
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