Bank
PRE
EMB_A[10] = 0
EMB_CLK
EMB_CS
EMB_WE_DQM
EMB_BA
EMB_A
EMB_RAS
EMB_CAS
EMB_WE
Architecture
785
SPRUH91D – March 2013 – Revised September 2016
Copyright © 2013–2016, Texas Instruments Incorporated
External Memory Interface B (EMIFB)
Table 19-3. Truth Table for SDRAM Commands
SDRAM
Pins:
CKE
CS
RAS
CAS
WE
BA[1:0]
A[12:11]
A[10]
A[9:0]
EMIFB
Pins:
EMB_SDCKE
EMB_CS
EMB_RAS
EMB_CAS
EMB_WE
EMB_BA[1:0]
EMB_A[12:11]
EMB_A[10]
EMB_A[9:0]
PRE
H
L
L
H
L
Bank/X
X
L/H
X
ACTV
H
L
L
H
H
Bank
Row
Row
Row
READ
H
L
H
L
H
Bank
Column
L
Column
WRT
H
L
H
L
L
Bank
Column
L
Column
BT
H
L
H
H
L
X
X
X
X
LMR
H
L
L
L
L
X
Mode
Mode
Mode
REFR
H
L
L
L
H
X
X
X
X
SLFR
L
L
L
L
H
X
X
X
X
NOP
H
L
H
H
H
X
X
X
X
Figure 19-2. Timing Waveform of SDRAM PRE Command